XC5VLX50T-2FFG665I Xilinx Inc, XC5VLX50T-2FFG665I Datasheet - Page 314

• Manufacturer Part Number: XC5VLX50T-2FFG665I
• Description: IC FPGA VIRTEX-5 50K 665FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX50T-2FFG665I

• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Total Ram Bits: 2211840
• Number Of I /o: 360
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 665-BBGA, FCBGA
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 6: SelectIO Resources
314
Weighted Average Calculation of SSO
This section describes the SSO calculation where the SSO contributions of all I/O in a bank
are combined into a single figure.
SSO of an individual bank is calculated by summing the SSO contributions of the
individual I/O standards in the bank. The SSO contribution is the percentage of full
utilization of any one I/O standard in any one bank. For drivers of each I/O standard, the
calculation follows:
For a bank with drivers of multiple I/O standards, the SSO calculation is:
A sample SSO calculation follows. The system parameters used are:
First, SSO limits for each I/O standard are obtained from
The SSO contribution of each I/O standard is calculated as:
Finally, the bank SSO is calculated:
Bank 1 SSO = SSO contribution (1) + SSO contribution (2) + SSO Contribution (3)
I/O Group
SSO Contribution (I/ O group n) = (quantity of drivers)/(Bank SSO limit)
Bank SSO
1
2
3
SSO Allowance
Device:
Bank:
I/O Standards, Quantities:
SSO Contribution
SSO Contribution (1)
SSO Contribution (2)
SSO Contribution (3)
= 30% + 20% + 48%
=
SSTL2_II
LVCMOS25_24 Fast
LVCMOS25_6 Fast
(
1 to n
∑
I/O Standard
)
SSO Contribution n ( )
www.xilinx.com
= SF1 × SF2 × SF3 × 100%
= 0.909 × 0.917 × 0.905 × 100%
= 75.4%
XC5VLX50 FF1153
11
SSTL2_II,
LVCMOS25_24 Fast,
LVCMOS25_6 Fast,
= (quantity of drivers)/(Bank SSO limit)
=
=
=
=
12/40
6/30
19/40
98%
SSO Limit (Drivers per Bank)
=
=
=
12
6
19
Table
30%
20%
48%
40
30
40
6-40:
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010