XC5VSX50T-2FF665C Xilinx Inc, XC5VSX50T-2FF665C Datasheet - Page 28

IC FPGA VIRTEX-5 50K 665FCBGA

XC5VSX50T-2FF665C

Manufacturer Part Number
XC5VSX50T-2FF665C
Description
IC FPGA VIRTEX-5 50K 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr

Specifications of XC5VSX50T-2FF665C

Number Of Logic Elements/cells
52224
Number Of Labs/clbs
4080
Total Ram Bits
4866048
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
For Use With
HW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC5VSX50T-2FF665C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VSX50T-2FF665C
Manufacturer:
XILINX
0
Part Number:
XC5VSX50T-2FF665C
Quantity:
2 930
Performance Characteristics
This section provides the performance characteristics of some common functions and designs implemented in
Virtex-5 devices. The numbers reported here are worst-case values; they have all been fully characterized. These values are
subject to the same guidelines as the
performance.
Table 52: Register-to-Register Performance
DS202 (v5.3) May 5, 2010
Product Specification
Basic Functions
16:1 Multiplexer
32:1 Multiplexer
64:1 Multiplexer
9 x 9 Logic Multiplier with 4 pipe stages
9 x 9 Logic Multiplier with 5 pipe stages
16-bit Adder
32-bit Adder
64-bit Adder
Register to LUT to Register
16-bit Counter
32-bit Counter
64-bit Counter
Memory
Cascaded block RAM (64K)
Block RAM Pipelined
Single-Port 512 x 36 bits
Single-Port 4096 x 4 bits
Dual-Port A: 4096 x 4 bits and B: 1024 x 18 bits
Distributed RAM
Single-Port 16 x 8
Single-Port 32 x 8
Single-Port 64 x 8
Dual-Port 16 x 8
Shift Register Chain
16-bit
32-bit
64-bit
Description
Switching Characteristics, page
www.xilinx.com
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
550
550
511
468
550
550
550
423
550
550
550
428
500
550
550
550
550
550
550
550
550
550
-3
Register-to-Register (with I/O Delays)
30.
Table 52
Speed Grade
500
500
467
438
500
500
500
377
500
500
500
381
450
500
500
500
500
500
500
500
500
500
shows internal (register-to-register)
-2
450
450
407
428
428
450
447
323
450
450
450
333
400
450
450
450
450
450
450
450
450
438
-1
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
28

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