IC FPGA VIRTEX-5 50K 665FCBGA

XC5VSX50T-2FF665C

Manufacturer Part NumberXC5VSX50T-2FF665C
DescriptionIC FPGA VIRTEX-5 50K 665FCBGA
ManufacturerXilinx Inc
SeriesVirtex™-5 SXT
XC5VSX50T-2FF665C datasheets
Product Change Notification
 

Specifications of XC5VSX50T-2FF665C

Number Of Logic Elements/cells52224Number Of Labs/clbs4080
Total Ram Bits4866048Number Of I /o360
Voltage - Supply0.95 V ~ 1.05 VMounting TypeSurface Mount
Operating Temperature0°C ~ 85°CPackage / Case665-BBGA, FCBGA
For Use WithHW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5Lead Free Status / RoHS StatusContains lead / RoHS non-compliant
Number Of Gates-  
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Input Serializer/Deserializer Switching Characteristics
Table 62: ISERDES Switching Characteristics
Symbol
Setup/Hold for Control Lines
T
/ T
BITSLIP pin Setup/Hold with respect to CLKDIV
ISCCK_BITSLIP
ISCKC_BITSLIP
(2)
T
/ T
CE pin Setup/Hold with respect to CLK (for CE1)
ISCCK_CE
ISCKC_CE
(2)
T
/ T
CE pin Setup/Hold with respect to CLKDIV (for CE2)
ISCCK_CE2
ISCKC_CE2
Setup/Hold for Data Lines
T
/T
D pin Setup/Hold with respect to CLK
ISDCK_D
ISCKD_D
T
/T
DDLY pin Setup/Hold with respect to CLK (using
ISDCK_DDLY
ISCKD_DDLY
IODELAY)
T
/T
D pin Setup/Hold with respect to CLK at DDR mode
ISDCK_DDR
ISCKD_DDR
T
D pin Setup/Hold with respect to CLK at DDR mode
ISDCK_DDLY_DDR
T
(using IODELAY)
ISCKD_DDLY_DDR
Sequential Delays
T
CLKDIV to out at Q pin
ISCKO_Q
Propagation Delays
T
D input to DO output pin
ISDO_DO
Notes:
1.
Recorded at 0 tap value.
2.
T
and T
are reported as T
ISCCK_CE2
ISCKC_CE2
DS202 (v5.3) May 5, 2010
Product Specification
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Description
/T
in TRACE report.
ISCCK_CE
ISCKC_CE
www.xilinx.com
Speed Grade
Units
-3
-2
-1
0.10
0.11
0.12
ns
0.00
0.00
0.00
0.43
0.49
0.59
ns
–0.24
–0.24
–0.24
0.03
0.04
0.06
ns
0.11
0.13
0.15
0.34
0.37
0.39
ns
–0.12
–0.12
–0.12
0.31
0.33
0.36
ns
–0.09
–0.09
–0.08
0.34
0.37
0.39
ns
–0.12
–0.12
–0.12
0.31
0.33
0.36
ns
–0.09
–0.09
–0.08
0.46
0.51
0.60
ns
0.20
0.22
0.26
ns
42