XC2VP50-7FFG1152C | |
|---|---|
| Manufacturer Part Number | XC2VP50-7FFG1152C |
| Description | IC FPGA VIRTEX-II PRO 1152-FBGA |
| Manufacturer | Xilinx Inc |
| Series | Virtex™-II Pro |
| XC2VP50-7FFG1152C datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
×
Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
- We ship worldwide using main international couriers like FedEx, DHL, UPS, TNT, EMS. We can also use client's freight account. Other shipping methods can be discussed. We do best to meet your needs!
Payment terms
- For new client payment term is payment in advance. At this moment we accept 3 payment methods: wire transfer, PayPal and Western Union. Credit card payment is under constrution and will be introduced soon. Escrow service is acceptable. Net terms for regular customers is not a problem. Working with us is totally safe for you.
- If you still have any questions - please contact us
Specifications of XC2VP50-7FFG1152C | |||
|---|---|---|---|
| Number Of Logic Elements/cells | 53136 | Number Of Labs/clbs | 5904 |
| Total Ram Bits | 4276224 | Number Of I /o | 692 |
| Voltage - Supply | 1.425 V ~ 1.575 V | Mounting Type | Surface Mount |
| Operating Temperature | 0°C ~ 85°C | Package / Case | 1152-BBGA, FCBGA |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | Number Of Gates | - |
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
PrevNext
R
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
DCM Timing Parameters
All devices are 100% functionally tested. Because of the dif-
ficulty in directly measuring many internal timing parame-
ters, those parameters are derived from benchmark timing
patterns. The following guidelines reflect worst-case values
Operating Frequency Ranges
e
Table 54: Operating Frequency Ranges
Description
Output Clocks (Low Frequency Mode)
CLK0, CLK90, CLK180, CLK270
(5,6)
CLK2X, CLK2X180
CLKDV
CLKFX, CLKFX180
Input Clocks (Low Frequency Mode)
(1,3,4)
CLKIN (using DLL outputs)
(2,3,4)
CLKIN (using CLKFX outputs)
PSCLK
Output Clocks (High Frequency Mode)
(6)
CLK0, CLK180
CLKDV
CLKFX, CLKFX180
Input Clocks (High Frequency Mode)
(1,3,4,6)
CLKIN (using DLL outputs)
(2,3,4)
CLKIN (using CLKFX outputs)
PSCLK
Notes:
1. “DLL outputs” is used here to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
2. If both DLL and CLKFX outputs are used, follow the more restrictive specification.
3. If the CLKIN_DIVIDE_BY_2 attribute of the DCM is used, then double these values.
4. If the CLKIN_DIVIDE_BY_2 attribute of the DCM is used and CLKIN frequency > 400 MHz, CLKIN duty cycle must be within ±5%
(45/55 to 55/45).
5. CLK2X and CLK2X180 may not be used as the input to the CLKFB pin. See the
information.
6. For the XC2VP100 -6 device only, clock macros for corner DCMS (X0Y0, X5Y0, X0Y1, X5Y1) are required to operate at maximum
clock frequency. See
XAPP685
for implementation examples.
DS083 (v4.7) November 5, 2007
Product Specification
across the recommended operating conditions. All output
jitter and phase specifications are determined through sta-
tistical measurement at the package pins.
Symbol
Constraints
CLKOUT_FREQ_1X_LF_MIN
CLKOUT_FREQ_1X_LF_MAX
CLKOUT_FREQ_2X_LF_MIN
CLKOUT_FREQ_2X_LF_MAX
CLKOUT_FREQ_DV_LF_MIN
CLKOUT_FREQ_DV_LF_MAX
CLKOUT_FREQ_FX_LF_MIN
CLKOUT_FREQ_FX_LF_MAX
CLKIN_FREQ_DLL_LF_MIN
CLKIN_FREQ_DLL_LF_MAX
CLKIN_FREQ_FX_LF_MIN
CLKIN_FREQ_FX_LF_MAX
PSCLK_FREQ_LF_MIN
PSCLK_FREQ_LF_MAX
CLKOUT_FREQ_1X_HF_MIN
CLKOUT_FREQ_1X_HF_MAX
CLKOUT_FREQ_DV_HF_MIN
CLKOUT_FREQ_DV_HF_MAX
CLKOUT_FREQ_FX_HF_MIN
CLKOUT_FREQ_FX_HF_MAX
CLKIN_FREQ_DLL_HF_MIN
CLKIN_FREQ_DLL_HF_MAX
CLKIN_FREQ_FX_HF_MIN
CLKIN_FREQ_FX_HF_MAX
PSCLK_FREQ_HF_MIN
PSCLK_FREQ_HF_MAX
www.xilinx.com
Speed Grade
-7
-6
-5
24.00
24.00
24.00
270.00
210.00
180.00
48.00
48.00
48.00
450.00
420.00
360.00
1.50
1.50
1.50
140.00
140.00
120.00
24.00
24.00
24.00
240.00
240.00
210.00
24.00
24.00
24.00
270.00
210.00
180.00
1.00
1.00
1.00
240.00
240.00
210.00
0.01
0.01
0.01
450.00
420.00
360.00
48.00
48.00
48.00
450.00
420.00
360.00
3.00
3.00
3.00
280.00
280.00
240.00
210.00
210.00
210.00
320.00
320.00
270.00
48.00
48.00
48.00
450.00
420.00
360.00
50.00
50.00
50.00
320.00
320.00
270.00
0.01
0.01
0.01
450.00
420.00
360.00
Virtex-II Pro Platform FPGA User Guide
Module 3 of 4
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
for more
45
Related parts for XC2VP50-7FFG1152C | |||
|---|---|---|---|
| Part Number | Description | Manufacturer | Datasheet |
 XC2VP50-7FFG1148C |
IC FPGA VIRTEX-II PRO 1148-FBGA | Xilinx Inc |
|
|
XC2VP50-7FFG1517C |
IC FPGA VIRTEX-II PRO 1517-FBGA | Xilinx Inc |
|
|
XC2VP50-5FFG1152C |
IC VIRTEXIIPRO FPGA 50K 1152FBGA | Xilinx Inc |
|
|
XC2VP50-5FFG1148C |
IC FPGA VIRTEX-II PRO 1148-FBGA | Xilinx Inc |
|
|
XC2VP50-5FFG1517C |
IC FPGA VIRTEX-II PRO 1517-FBGA | Xilinx Inc |
|
|
XC2VP50-6FFG1152C |
IC VIRTEXIIPRO FPGA 50K 1152FBGA | Xilinx Inc |
|
|
XC2VP50-5FFG1148I |
IC FPGA VIRTEX-II PRO 1148-FBGA | Xilinx Inc |
|
|
XC2VP50-5FFG1152I |
IC FPGA VIRTEX-II PRO 1152-FBGA | Xilinx Inc |
|
|
XC2VP50-6FFG1148C |
IC FPGA VIRTEX-II PRO 1148-FBGA | Xilinx Inc |
|
|
XC2VP50-5FFG1517I |
IC FPGA VIRTEX-II PRO 1517-FBGA | Xilinx Inc |
|
|
XC2VP50-6FFG1517C |
IC FPGA VIRTEX-II PRO 1517-FBGA | Xilinx Inc |
|
|
XC2VP50-6FFG1148I |
IC FPGA VIRTEX-II PRO 1148-FBGA | Xilinx Inc |
|
|
XC2VP50-6FFG1152I |
IC FPGA VIRTEX-II PRO 1152-FBGA | Xilinx Inc |
|
|
XC2VP50-6FFG1517I |
IC FPGA VIRTEX-II PRO 1517-FBGA | Xilinx Inc |
|
|
XC2VP50-5FF1152I |
IC FPGA VIRTEX-II PRO 1152FFBGA | Xilinx Inc |
|
