IC LOGIC CL ARRAY 3000GAT 84PLCC

XC3030A-7PC84C

Manufacturer Part NumberXC3030A-7PC84C
DescriptionIC LOGIC CL ARRAY 3000GAT 84PLCC
ManufacturerXilinx Inc
SeriesXC3000A/L
XC3030A-7PC84C datasheet
 


Specifications of XC3030A-7PC84C

Number Of Labs/clbs100Total Ram Bits22176
Number Of I /o74Number Of Gates2000
Voltage - Supply4.75 V ~ 5.25 VMounting TypeSurface Mount
Operating Temperature0°C ~ 85°CPackage / Case84-LCC (J-Lead)
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantNumber Of Logic Elements/cells-
Other names122-1018  
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Product Obsolete or Under Obsolescence
XC3000 Series Field Programmable Gate Arrays
DIN
Bit n
1 T
DCC
CCLK
DOUT
(Output)
Description
To DOUT
DIN setup
CCLK
DIN hold
High time
Low time (Note 1)
Frequency
Notes: 1. The max limit of CCLK Low time is caused by dynamic circuitry inside the FPGA.
2. Configuration must be delayed until the INIT of all FPGAs is High.
3. At power-up, V
must rise from 2.0 V to V
CC
holding RESET Low until VCC has reached 4.0 V (2.5 V for the XC3000L). A very long V
non-monotonically rising V
may require a >6- s High level on RESET, followed by a >6- s Low level on RESET and D/P
CC
after V
has reached 4.0 V (2.5 V for the XC3000L).
CC
Figure 30: Slave Serial Mode Programming Switching Characteristics
7-32
Bit n + 1
2 T
CCD
4 T
3 T
CCH
Bit n - 1
Symbol
3
T
CCO
1
T
DCC
2
T
CCD
4
T
CCH
5
T
CCL
F
CC
min in less than 25 ms. If this is not possible, configuration can be delayed by
CC
5 T
CCL
CCO
Bit n
X5379
Min
Max
Units
100
ns
60
ns
0
ns
0.05
s
0.05
5.0
s
10
MHz
rise time of >100 ms, or a
CC
November 9, 1998 (Version 3.1)
R