XC4013XL-1PQ160I

Manufacturer Part NumberXC4013XL-1PQ160I
DescriptionIC FPGA I-TEMP 3.3V 1SPD 160PQFP
ManufacturerXilinx Inc
SeriesXC4000E/X
XC4013XL-1PQ160I datasheets

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Specifications of XC4013XL-1PQ160I

Number Of Logic Elements/cells1368Number Of Labs/clbs576
Total Ram Bits18432Number Of I /o129
Number Of Gates13000Voltage - Supply3 V ~ 3.6 V
Mounting TypeSurface MountOperating Temperature-40°C ~ 100°C
Package / Case160-BQFPLead Free Status / RoHS StatusContains lead / RoHS non-compliant
XC4005XL-09PQ160C PDF datasheetXC4013XL-1BG256C PDF datasheet #2
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XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4000XL Electrical Specifications
Definition of Terms
In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as
follows:
Advance:
Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or
devicefamilies. Values are subject to change. Use as estimates, not for production.
Preliminary:
Based on preliminary characterization. Further changes are not expected.
Unmarked:
Specifications not identified as either Advance or Preliminary are to be considered Final.
Except for pin-to-pin input and output parameters, the a.c. parameter delay specifications included in this document are
derived from measuring internal test patterns. All specifications are representative of worst-case supply voltage and junction
temperature conditions.
All specifications subject to change without notice.
XC4000XL D.C. Characteristics
Absolute Maximum Ratings
V
Supply voltage relative to Ground
CC
V
Input voltage relative to Ground (Note 1)
IN
V
Voltage applied to 3-state output (Note 1)
TS
V
Longest Supply Voltage Rise Time from 1 V to 3V
CCt
T
Storage temperature (ambient)
STG
T
Maximum soldering temperature (10 s @ 1/16 in. = 1.5 mm)
SOL
T
Junction Temperature
J
Note 1: Maximum DC excursion above V
cc
achieve. During transitions, the device pins may undershoot to -2.0 V or overshoot toV
undershoot lasts less than 10 ns and with the forcing current being limited to 200 mA.
Note:
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under
Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended
periods of time may affect device reliability.
Recommended Operating Conditions
Symbol
Supply voltage relative to Gnd, T
V
CC
Supply voltage relative to Gnd, T
V
High-level input voltage
IH
V
Low-level input voltage
IL
T
Input signal transition time
IN
Notes:
At junction temperatures above those listed above, all delay parameters increase by 0.35% per C.
Input and output measurement threshold is ~50% of V
DS005 (v. 1.8 October 18, 1999 - Product Specification
Description
Ceramic packages
Plastic packages
or below Ground must be limited to either 0.5 V or 10 mA, whichever is easier to
Description
= 0 C to +85 C
Commercial
J
= -40 C to +100 C Industrial
J
.
CC
Units
-0.5 to 4.0
V
-0.5 to 5.5
V
-0.5 to 5.5
V
50
ms
-65 to +150
C
+260
C
+150
C
+125
C
+2.0 V, provided this over or
CC
Min
Max
Units
3.0
3.6
V
3.0
3.6
V
50% of V
5.5
V
CC
0
30% of V
V
CC
250
ns
6-73
6

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XC4013XL-1PQ160I Summary of contents

  • Page 1

    R XC4000E and XC4000X Series Field Programmable Gate Arrays XC4000XL Electrical Specifications Definition of Terms In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as follows: Advance: Initial estimates based on simulation ...

  • Page 2

    XC4000E and XC4000X Series Field Programmable Gate Arrays D.C. Characteristics Over Recommended Operating Conditions Symbol High-level output voltage @ High-level output voltage @ I Low-level output voltage @ Low-level output voltage @ I V ...

  • Page 3

    ... DS005 (v. 1.8 October 18, 1999 - Product Specification Speed Grade All -3 Symbol Device Min Max T XC4002XL 0.3 2.1 GLS XC4005XL 0.4 2.7 XC4010XL 0.5 3.2 XC4013XL 0.6 3.6 XC4020XL 0.7 4.0 XC4028XL 0.9 4.4 XC4036XL 1.1 4.8 XC4044XL 1.2 5.3 XC4052XL 1.3 5.7 XC4062XL 1 ...

  • Page 4

    ... XC4085XL 0.4 5.8 Speed Grade All -3 Symbol Device Min Max T XC4002XL 0.5 2.8 GE XC4005XL 0.7 3.1 XC4010XL 0.7 3.5 XC4013XL 0.7 3.8 XC4020XL 0.8 4.1 XC4028XL 0.9 4.4 XC4036XL 0.9 4.7 XC4044XL 1.0 5.1 XC4052XL 1.1 5.5 XC4062XL 1.2 5.9 XC4085XL 1 ...

  • Page 5

    R XC4000E and XC4000X Series Field Programmable Gate Arrays XC4000XL CLB Characteristics Testing of switching parameters is modeled after testing methods specified by MIL standards. functionally tested. Internal timing parameters are derived from measuring internal test patterns. Listed below are ...

  • Page 6

    XC4000E and XC4000X Series Field Programmable Gate Arrays CLB Single-Port RAM Synchronous (Edge-Triggered) Write Operation Guidelines Testing of switching parameters is modeled after testing methods specified by MIL standards. functionally tested. Internal timing parameters are derived from measuring internal test ...

  • Page 7

    R XC4000E and XC4000X Series Field Programmable Gate Arrays CLB Dual-Port RAM Synchronous (Edge-Triggered) Write Operation Guidelines Testing of switching parameters is modeled after testing methods specified by MIL standards. functionally tested. Internal timing parameters are derived from measuring internal ...

  • Page 8

    ... Speed Grade All -3 Symbol Device Min Max T XC4002XL 1.2 7.1 ICKOF XC4005XL 1.3 7.7 XC4010XL 1.4 8.2 XC4013XL 1.5 8.6 XC4020XL 1.6 9.0 XC4028XL 1.8 9.4 XC4036XL 2.0 9.8 XC4044XL 2.1 10.3 XC4052XL 2.2 10.7 XC4062XL 2.3 11 ...

  • Page 9

    ... XC4085XL 1.3 10.8 Speed Grade All -3 Symbol Device Min Max T XC4002XL 1.3 7.8 ICKEOF XC4005XL 1.5 8.1 XC4010XL 1.6 8.5 XC4013XL 1.6 8.8 XC4020XL 1.7 9.1 XC4028XL 1.7 9.4 XC4036XL 1.8 9.7 XC4044XL 1.9 10.1 XC4052XL 2.0 10.5 XC4062XL 2.0 10.9 XC4085XL 2 ...

  • Page 10

    ... Global Low Skew Clock and IFF IFF = Input Flip-Flop or Latch * The XC4013XL, XC4036XL, and 4062XL have significantly faster partial and full delay setup times than other devices. Notes: Input setup time is measured with the fastest route and the lightest load. ...

  • Page 11

    ... PHED IFF = Input Flip-Flop or Latch, FCL = Fast Capture Latch * The XC4013XL, XC4036XL, and 4062XL have significantly faster partial and full delay setup times than other devices. Notes: Input setup time is measured with the fastest route and the lightest load. Input hold time is measured using the furthest distance and a reference load of one clock pin per IOB as well as driving all accessible CLB fl ...

  • Page 12

    ... PSED IFF * The XC4013XL, XC4036XL, and 4062XL have significantly faster partial and full delay setup times than other devices. IFF = Input Flip Flop or Latch. FCL = Fast Capture Latch Notes: Input setup time is measured with the fastest route and the lightest load. ...

  • Page 13

    ... XC4013, 36, 62XL 1.2 POCK Balance of Family 1.2 All Devices 0 T All devices 19.8 MRW Max T XC4002XL 9.8 RRI* XC4005XL 11.3 XC4010XL 13.9 XC4013XL 15.9 XC4020XL 18.6 XC4028XL 20.5 XC4036XL 22.5 XC4044XL 25.1 XC4052XL 27.2 XC4062XL 29.1 XC4085XL 34.4 T All devices 1.6 PID ...

  • Page 14

    ... Output (O) to clock (OK) hold time Clock Enable (EC) to clock (OK) setup time Clock Enable (EC) to clock (OK) hold time Global Set/Reset Minimum GSR pulse width Delay from GSR input to any Pad XC4002XL XC4005XL XC4010XL XC4013XL XC4020XL XC4028XL XC4036XL XC4044XL XC4052XL XC4062XL XC4085XL Slew Rate Adjustment ...

  • Page 15

    R XC4000E and XC4000X Series Field Programmable Gate Arrays Revision Control Version 2/1/99 (1.5) Release included in the 1999 data book, section 6 5/14/99 (1.6) Replaced Electrical Specification and pinout pages for E, EX, and XL families with separate updates ...

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