PIC12F510-I/SN Microchip Technology, PIC12F510-I/SN Datasheet
PIC12F510-I/SN
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PIC12F510-I/SN Summary of contents
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... Flash Microcontrollers © 2007 Microchip Technology Inc. PIC12F510/16F506 Data Sheet DS41268D ...
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... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Special Function Hardware Registers (PIC12F510) • 13 Special Function Hardware Registers (PIC16F506) • Operating Speed – 8 MHz Crystal Oscillator (PIC12F510 – 500 ns instruction cycle (PIC12F510 – 20 MHz Crystal Oscillator (PIC16F506 – 200 ns instruction cycle (PIC16F506) Special Microcontroller Features: • MHz Selectable Precision Internal Oscillator: - Factory calibrated to ± ...
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... PIC12F510/16F506 Program Memory Device Flash (words) PIC16F506 PIC12F510 Pin Diagrams PDIP, SOIC and TSSOP RB5/OSC1/CLKIN RB4/OSC2/CLKOUT RB3/MCLR/V RC5/T0CKI RC4/C2OUT PDIP, SOIC, MSOP GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V DFN GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V DS41268D-page 2 Data Memory SRAM (bytes) 1024 67 1024 RB0/AN0/C1IN+/ICSPDAT 2 13 RB1/AN1/C1IN-/ICSPCLK ...
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... Table of Contents 1.0 General Description...................................................................................................................................................................... 5 2.0 PIC12F510/16F506 Device Varieties .......................................................................................................................................... 7 3.0 Architectural Overview ................................................................................................................................................................. 9 4.0 Memory Organization ................................................................................................................................................................. 15 5.0 I/O Port ....................................................................................................................................................................................... 27 6.0 TMR0 Module and TMR0 Register............................................................................................................................................. 39 7.0 Comparator(s) ............................................................................................................................................................................ 43 8.0 Comparator Voltage Reference Module (PIC16F506 only)........................................................................................................ 49 9.0 Analog-to-Digital (A/D) Converter............................................................................................................................................... 51 10.0 Special Features Of The CPU.................................................................................................................................................... 55 11 ...
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... PIC12F510/16F506 NOTES: DS41268D-page 4 © 2007 Microchip Technology Inc. ...
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... In-Circuit Serial Programming Number of Instructions Packages The PIC12F510/16F506 devices have Power-on Reset, selectable Watchdog Timer, selectable code-protect, high I/O current capability and precision internal oscillator. The PIC12F510/16F506 devices use serial programming with data pin RB0/GP0 and clock pin RB1/GP1. © 2007 Microchip Technology Inc. ...
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... PIC12F510/16F506 NOTES: DS41268D.-page 6 © 2007 Microchip Technology Inc. ...
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... A variety of packaging options are available. Depend- ing on application and production requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC12F510/16F506 Product Identification System at the back of this data sheet to specify the correct part number. 2.1 ...
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... PIC12F510/16F506 NOTES: DS41268D-page 8 © 2007 Microchip Technology Inc. ...
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... The PIC12F510/16F506 devices can directly or indi- rectly address its register files and data memory. All Special Function Registers (SFRs), including the PC, are mapped in the data memory. The PIC12F510/ 16F506 devices have a highly orthogonal (symmetri- cal) instruction set that makes it possible to carry out any operation, on any register, using any addressing mode. This symmetrical nature and lack of “ ...
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... PIC12F510/16F506 FIGURE 3-1: PIC12F510 SERIES BLOCK DIAGRAM 10-11 Flash Program Memory Program 12 Bus Instruction Reg 8 Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2 MCLR DS41268D-page 10 8 Data Bus Program Counter RAM STACK 1 38 bytes STACK 2 File Registers RAM Addr 9 Addr MUX ...
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... TABLE 3-2: PIN DESCRIPTIONS – PIC12F510 Name I/O/P Type GP0/AN0/C1IN+/ICSPDAT GP0 AN0 C1IN+ ICSPDAT GP1/AN1/C1IN-/ICSPCLK GP1 AN1 C1IN- ICSPCLK GP2/AN2/T0CKI/C1OUT GP2 AN2 T0CKI C1OUT GP3/MCLR/V GP3 PP MCLR V PP GP4/OSC2 GP4 OSC2 GP5/OSC1/CLKIN GP5 OSC1 CLKIN Legend input output, I/O = input/output power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage High Voltage © ...
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... PIC12F510/16F506 FIGURE 3-2: PIC16F506 SERIES BLOCK DIAGRAM 10 Flash Program Memory Program 10 Bus Instruction Reg 8 Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2/CLKOUT MCLR DS41268D-page 12 8 Data Bus Program Counter RAM STACK 1 67 bytes STACK 2 File Registers RAM Addr 9 Addr MUX Indirect ...
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... Legend input output, I/O = input/output power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage High Voltage © 2007 Microchip Technology Inc. PIC12F510/16F506 Output Input Type Type TTL CMOS Bidirectional I/O port. Can be software pro- grammed for internal weak pull-up and wake-up from Sleep on pin change ...
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... PIC12F510/16F506 3.1 Clocking Scheme/Instruction Cycle The clock input (OSC1/CLKIN pin) is internally divided by four to generate four non-overlapping quadrature clocks, namely Q1, Q2, Q3 and Q4. Internally, the PC is incremented every Q1 and the instruction is fetched from program memory and latched into the instruction register in Q4 decoded and executed during the following Q1 through Q4 ...
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... For devices with more than 512 bytes of program memory, a paging scheme is used. Program memory pages are accessed using STATUS register bit PA0. For the PIC12F510 and PIC16F506, with data memory register files of more than 32 registers, a banking scheme is used. Data memory banks are accessed using the File Select Register (FSR) ...
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... I/O port configuration and prescaler options. The General Purpose Registers are used for data and control information under command of the instructions. For the PIC12F510, the register file is composed of 10 Special Function Registers, 6 General Purpose Registers and 32 General Purpose Registers accessed by banking (see Figure 4-2). ...
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... The Special Function Registers associated with the “core” functions are described in this section. Those related to the operation of the peripheral features are described in the section for each peripheral feature. TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY – PIC12F510 Address Name Bit 7 Bit 6 N/A ...
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... PIC12F510/16F506 TABLE 4-2: SPECIAL FUNCTION REGISTER SUMMARY – PIC16F506 Address Name Bit 7 Bit 6 N/A TRIS I/O Control Registers (TRISB, TRISC) N/A OPTION Contains control bits to configure Timer0 and Timer0/WDT Prescaler 00h INDF Uses contents of FSR to address data memory (not a physical register) ...
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... REGISTER 4-1: STATUS: STATUS REGISTER (PIC12F510) R/W-0 R/W-0 R/W-0 GPWUF CWUF PA0 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 GPWUF: GPIO Reset bit 1 = Reset due to wake-up from Sleep on pin change 0 = After power-up or other Reset bit 6 ...
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... PIC12F510/16F506 REGISTER 4-2: STATUS: STATUS REGISTER (PIC16F506) R/W-0 R/W-0 R/W-0 RBWUF CWUF PA0 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 RBWUF: PORTB Reset bit 1 = Reset due to wake-up from Sleep on pin change 0 = After power-up or other Reset ...
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... TRIS overrides Option control of GPPU/RBPU and GPWU/RBWU the T0CS bit is set to ‘1’, it will override the TRIS function on the T0CKI pin. REGISTER 4-3: OPTION_REG: OPTION REGISTER (PIC12F510) W-1 W-1 W-1 GPWU GPPU T0CS ...
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... PIC12F510/16F506 REGISTER 4-4: OPTION_REG: OPTION REGISTER (PIC16F506) W-1 W-1 W-1 RBWU RBPU T0CS bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 RBWU: Enable Wake-up On Pin Change bit (RB0, RB1, RB3, RB4 Disabled 0 = Enabled bit 6 RBPU: Enable Weak Pull-Ups bit (RB0, RB1, RB3, RB4) ...
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... Center frequency 1111111 • • • 1000000 = Minimum frequency bit 0 Unimplemented: Read as ‘0’ © 2007 Microchip Technology Inc. PIC12F510/16F506 R/W-1 R/W-1 R/W-1 CAL3 CAL2 CAL1 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-1 U-0 CAL0 — ...
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... Stack The PIC12F510/16F506 devices have a two-deep, 12-bit wide hardware PUSH/POP stack. A CALL instruction will PUSH the current value of Stack 1 into Stack 2 and then PUSH the current PC value, incremented by one, into Stack Level 1. If more than two sequential CALLs are executed, only the most recent two return addresses are stored ...
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... The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. PIC16F506 – Uses FSR<6:5>. Selects from Bank 0 to Bank 3. FSR<7> is unimplemented, read as ‘1’. PIC12F510 – Uses FSR<5>. Selects from Bank 0 to Bank 1. FSR<7:6> are unimplemented, read as ‘11’ Addresses map back to addresses in Bank 0 ...
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... PIC12F510/16F506 FIGURE 4-6: DIRECT/INDIRECT ADDRESSING (PIC16F506) Direct Addressing (FSR) (opcode Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Figure 4-3. DS41268D-page Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh Bank 0 Bank 1 Bank 2 Bank 3 ...
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... Input/Output modes. On Reset, all I/O ports are defined as input (inputs are at high-impedance) since the I/O control registers are all set. Note: On the PIC12F510, I/O PORTB is refer- enced as GPIO. On the PIC16F506, I/O PORTB is referenced as PORTB. 5.1 PORTB/GPIO PORTB/GPIO is an 8-bit I/O register. Only the low- order 6 bits are used (RB/GP< ...
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... PIC12F510/16F506 FIGURE 5-2: BLOCK DIAGRAM OF GP0/RB0 AND GP1/RB1 GPPU RBPU Data Bus D Q Data WR Latch Port Reg D Q TRIS Latch TRIS ‘f’ Reset ADC pin Ebl COMP pin Ebl RD Port Mismatch ADC COMP Note 1: I/O pins have protection diodes DS41268D-page 28 ...
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... Q TRIS Latch TRIS ‘f’ Reset T0CS C1T0CS ADC Pin Enable RD Port T0CKI ADC Note 1: I/O pins have protection diodes © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-5: C1OUT (1) I/O Pin Data Bus D Data WR Latch Port CK C1OUTEN W Reg D TRIS Latch TRIS ‘f’ ...
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... PIC12F510/16F506 FIGURE 5-6: BLOCK DIAGRAM OF RB4 RBPU Data Bus Data WR Latch Port OSC W Reg D Q TRIS Latch TRIS ‘f’ Reset INTOSC/RC/EC CLKOUT Enable RD Port Oscillator OSC1 Circuit Note 1: I/O pins have protection diodes Input mode is disabled when pin is used for oscillator ...
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... TRIS ‘f’ Reset RD Port Oscillator OSC2 Circuit Note 1: I/O pins have protection diodes Input mode is disabled when pin is used for oscillator. © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-9: Data Bus D I/O (1) pin WR Port CK W Reg D TRIS ‘f’ CK (Note 2) ...
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... PIC12F510/16F506 FIGURE 5-10: BLOCK DIAGRAM OF RC2 VROE CV REF Data Bus D Q Data WR Latch Port Reg D Q TRIS Latch TRIS ‘f’ Reset RD Port COMP2 Note 1: I/O pins have protection diodes DS41268D-page 32 FIGURE 5-11: Data Bus D Data WR Latch 1 (1) I/O PIN Port ...
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... Q CK C2OUTEN W Reg D Q TRIS Latch TRIS ‘f’ Reset RD Port Note 1: I/O pins have protection diodes © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-13: (1) I/O Pin Data Bus D Data WR Latch Port CK W Reg D TRIS Latch TRIS ‘f’ CK Reset RD Port ...
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... TRISB TRISB 3 — — TABLE 5-3: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC16F506) Priority RC0 RC1 1 C2IN+ C2IN- 2 TRISC TRISC TABLE 5-4: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC12F510) Priority GP0 GP1 1 AN0/C1IN+ AN1/C1IN- 2 TRISIO TRISIO 3 — — 4 — — DS41268D-page 34 Bit 5 Bit 4 ...
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... TABLE 5-5: REQUIREMENTS FOR DIGITAL PIN OPERATION (PIC12F510) GP0 GP0 CM1CON0 C1ON 0 1 C1PREF — 0 C1NREF — — C1T0CS — — C1OUTEN — — CM2CON0 C2ON — — C2PREF1 — — C2PREF2 — — C2NREF — — C2OUTEN — — VRCON0 VROE — ...
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... PIC12F510/16F506 TABLE 5-6: REQUIREMENTS FOR DIGITAL PIN OPERATION (PIC16F506 PORTB) RB0 RB0 CM1CON0 C1ON — 0 C1PREF — — C1NREF — — C1T0CS — — C1OUTEN — — CM2CON0 C2ON — 1 C2PREF1 — 0 C2PREF2 — 1 C2NREF — — C2OUTEN — — OPTION T0CS — ...
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... Instruction Fetched MOVWF PORTB MOVF PORTB, W RB<5:0> Port pin written here Instruction Executed MOVWF PORTB (Write to PORTB) © 2007 Microchip Technology Inc. PIC12F510/16F506 EXAMPLE 5-1: ;Initial PORTB Settings ;PORTB<5:3> Inputs ;PORTB<2:0> Outputs ; ; ; BCF PORTB, 5 ;--01 -ppp BCF PORTB, 4 ;--10 -ppp MOVLW 007h ...
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... PIC12F510/16F506 NOTES: DS41268D-page 38 © 2007 Microchip Technology Inc. ...
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... The prescaler is shared with the Watchdog Timer (Figure 6-5). 3: Bit C1T0CS is located in the CM1CON0 register, CM1CON0<4>. © 2007 Microchip Technology Inc. PIC12F510/16F506 The second Counter mode uses the output of the com- parator to increment Timer0. It can be entered in two different ways. The first way is selected by setting the T0CS bit (OPTION< ...
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... OPTION GPWU GPPU (1) N/A TRISGPIO — — Legend: Shaded cells not used by Timer0, – = unimplemented unknown unchanged. Note 1: The TRIS of the T0CKI pin is overridden when T0CS = 1. 2: For PIC12F510. 3: For PIC16F506. DS41268D-page NT0 Read TMR0 Read TMR0 Write TMR0 executed reads NT0 ...
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... WDT and vice-versa. The PSA and PS<2:0> bits (OPTION<3:0>) determine prescaler assignment and prescale ratio. © 2007 Microchip Technology Inc. PIC12F510/16F506 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical. ...
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... Timer WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. 2: T0CKI is shared with pin GP2 on the PIC12F510 and shared with RC5 on the PIC16F506. 3: Bit C1T0CS is located in the CM1CON0 register. DS41268D-page 42 To change prescaler from the WDT to the Timer0 module, use the sequence shown in Example 6-2 ...
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... COMPARATOR(S) The PIC12F510 contains one analog comparator module. The PIC16F506 contains two comparators and a comparator voltage reference. REGISTER 7-1: CM1CON0: COMPARATOR C1 CONTROL REGISTER (PIC12F510) R-1 R/W-1 R/W-1 C1OUT C1OUTEN C1POL bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set ...
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... PIC12F510/16F506 REGISTER 7-2: CM1CON0: COMPARATOR C1 CONTROL REGISTER (PIC16F506) R-1 R/W-1 R/W-1 C1OUT C1OUTEN C1POL bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 C1OUT: Comparator Output bit > < bit 6 C1OUTEN: Comparator Output Enable bit 1 = Output of comparator is NOT placed on the C1OUT pin ...
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... Wake-up on Comparator change is enabled. Note 1: Overrides TOCS bit for TRIS control of RC4. 2: When comparator is turned on, these control bits assert themselves. Otherwise, the other registers have precedence. © 2007 Microchip Technology Inc. PIC12F510/16F506 R/W-1 R/W-1 R/W-1 C2PREF2 C2ON C2NREF U = Unimplemented bit, read as ‘0’ ...
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... PIC12F510/16F506 FIGURE 7-1: COMPARATOR 1 BLOCK DIAGRAM FOR PIC12F510/16F506 C1PREF C1IN- 0 C1IN+ 1 C1NREF C1IN- 1 0.6V 0 (Internal Reference) Note 1: When C1ON = 0, the comparator, C1, will produce a ‘0’ output to the XOR Gate. FIGURE 7-2: COMPARATOR 2 BLOCK DIAGRAM (PIC16F506 ONLY) C2PREF1 C2PREF2 C2IN C1IN C2IN- ...
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... CM2CON0 register. This bit is read-only. The comparator output may also be used externally, see Figure 7-3. © 2007 Microchip Technology Inc. PIC12F510/16F506 Note: Analog levels on any pin that is defined as a digital input may cause the input buffer to consume more current than is specified. ...
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... C2OUTEN (2) N/A TRISB — — (2) N/A TRISC — — (1) N/A TRISGPIO — — Legend Unknown Unchanged, – = Unimplemented, read as ‘0’ Depends on condition. Note 1: PIC12F510 only. 2: PIC16F506 only. DS41268D-page 0. LEAKAGE V = 0.6V ±500 Input Capacitance = Threshold Voltage = Leakage Current at the Pin = Interconnect Resistance ...
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... CV module current. The voltage reference is V the CV output changes with fluctuations in V REF tested absolute accuracy of the comparator voltage reference can be found in Section 13.2 “DC Charac- teristics: PIC12F510/16F506 (Extended)”. DD /32) DD U-1 R/W-1 — VR3 U = Unimplemented bit, read as ‘ ...
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... PIC12F510/16F506 FIGURE 8-1: COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM 16-1 Analog VREN CV to REF Comparator 2 Input VR<3:0> RC2/CV REF V ROE TABLE 8-1: REGISTERS ASSOCIATED WITH COMPARATOR VOLTAGE REFERENCE Add Name Bit 7 Bit 6 0Ch VRCON VREN VROE (1) 08h CM1CON0 C1OUT C1OUTEN (1) 0Bh CM2CON0 ...
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... Microchip Technology Inc. PIC12F510/16F506 When the CHS<1:0> bits are changed during an ADC conversion, the new channel will not be selected until the current conversion is completed. This allows the current conversion to complete with valid results. All channel selection information will be lost when the device enters Sleep ...
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... PIC12F510/16F506 9.1.5 SLEEP This ADC does not have a dedicated ADC clock, and therefore, no conversion in Sleep is possible conversion is underway and a Sleep command is executed, the GO/DONE and ADON bit will be cleared. This will stop any conversion in process and power- down the ADC module to conserve power. Due to the nature of the conversion process, the ADRES may con- tain a partial conversion ...
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... ADRES to serve as an internal conversion complete bit. As each bit weight, starting with the MSB, is con- verted, the leading one is shifted right and the con- verted bit is stuffed into ADRES. After a total of 9 right REGISTER 9-1: ADCON0: A/D CONTROL REGISTER (PIC12F510) R/W-1 R/W-1 R/W-1 ANS1 ...
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... PIC12F510/16F506 REGISTER 9-2: ADRES REGISTER R-X R-X R-X ADRES7 ADRES6 ADRES5 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set EXAMPLE 9-1: PERFORMING AN ANALOG-TO-DIGITAL CONVERSION ;Sample code operates out of BANK0 MOVLW 0xF1 ;configure A/D MOVWF ADCON0 BSF ADCON0, 1 ...
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... Configuration bits can be programmed to select various device configurations. Three bits are for the selection of the oscillator type; (two bits on the PIC12F510), one bit is the Watchdog Timer enable bit, one bit is the MCLR enable bit and one bit is for code protection (Register 10-1, Register 10-2). ...
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... XT oscillator with 18 ms DRT 10 = INTOSC with 1.125 ms DRT 11 = EXTRC with 1.125 ms DRT Note 1: Refer to the “PIC12F510 Memory Programming Specification” (DS41257) to determine how to access the Configuration Word the responsibility of the application designer to ensure the use of the 1.125 ms (nominal) DRT will result in acceptable operation. Refer to Electrical Specifications for V ments for this mode of operation ...
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... Refer to the “PIC16F506 Memory Programming Specification” (DS41258) to determine how to access the Configuration Word the responsibility of the application designer to ensure the use of the 1.125 ms (nominal) DRT will result in acceptable operation. Refer to Electrical Specifications for V ments for this mode of operation. © 2007 Microchip Technology Inc. PIC12F510/16F506 — — — CP WDTE FOSC2 ...
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... PIC12F510/16F506 10.2 Oscillator Configurations 10.2.1 OSCILLATOR TYPES The PIC12F510/16F506 devices can be operated six different oscillator modes. The user can program up to three Configuration bits [PIC12F510], FOSC<2:0> [PIC16F506]). To select one of these modes: •LP: Low-Power Crystal •XT: Crystal/Resonator •HS: High-Speed Crystal/Resonator (PIC16F506 only) • ...
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... The user also needs to take into account EXT variation due to tolerance of external R and C components used. Figure 10-5 shows how the R/C combination is connected to the PIC12F510/16F506 devices. For R values below 5.0 kΩ, the oscillator operation may EXT become unstable or stop completely. For very high R values (e.g., 1 MΩ ...
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... The calibration DD value must be read prior to erasing the part so it can be reprogrammed correctly later. For the PIC12F510/16F506 devices, only bits <7:1> of OSCCAL are used for calibration. See Register 4-5 for more information. Note: The 0 bit of OSCCAL is unimplemented and should be written as ‘0’ when modify- ...
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... PD, CWUF and RBWUF/GPWUF bits. They are set or cleared differently in different Reset situations. These bits are used in software to determine the nature of Reset. See Table 10-4 for a full description of Reset states of all registers. TABLE 10-3: RESET CONDITIONS FOR REGISTERS – PIC12F510 Register Address W — INDF ...
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... PIC12F510/16F506 TABLE 10-4: RESET CONDITIONS FOR REGISTERS – PIC16F506 Register Address W — INDF 00h TMR0 01h PCL 02h STATUS 03h FSR 04h OSCCAL 05h PORTB 06h PORTC 07h CM1CON0 08h ADCON0 09h ADRES 0Ah CM2CON0 0Bh VRCON 0Ch OPTION — TRISB — ...
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... GPWU/RBWU (GP3/RB3)/MCLR/V MCLRE 10.4 Power-on Reset (POR) The PIC12F510/16F506 devices incorporate an on- chip Power-on Reset (POR) circuitry, which provides an internal chip Reset for most power-up situations. The on-chip POR circuit holds the chip in Reset until V has reached a high enough level for proper oper- DD ation ...
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... PIC12F510/16F506 FIGURE 10-7: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT V DD Power-up Detect (GP3/RB3)/MCLR/V PP MCLRE WDT Reset WDT Time-out Pin Change Sleep Wake-up on pin Change Reset Comparator Change Wake-up on Comparator Change FIGURE 10-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR PULLED LOW MCLR Internal POR ...
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... MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 ≥ V © 2007 Microchip Technology Inc. PIC12F510/16F506 V1 TDRT time-out expires long before V DRT DD ): SLOW V RISE DD DD has reached its final min ...
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... PIC12F510/16F506 10.5 Device Reset Timer (DRT) On the PIC12F510/16F506 devices, the DRT runs any time the device is powered up. DRT runs from Reset and varies based on oscillator selection and Reset type (see Table 10-6). The DRT operates from a free running on-chip oscilla- tor that is separate from INTOSC. The processor is kept in Reset as long as the DRT is active ...
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... Bit 6 (1) N/A OPTION GPWU GPPU T0CS (2) N/A OPTION RBWU RBPU Legend: Shaded boxes = Not used by Watchdog Timer. – = unimplemented, read as ‘0’ unchanged. Note 1: PIC12F510 only. 2: PIC16F506 only. © 2007 Microchip Technology Inc. PIC12F510/16F506 0 M Postscaler Postscaler 8-to-1 MUX PSA ...
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... A brown-out is a condition where device power (V dips below its minimum value, but not to zero, and then recovers. The device should be reset in the event of a brown-out. To reset PIC12F510/16F506 devices when a brown- out occurs, external brown-out protection circuits may be built, as shown in Figure 10-12 and Figure 10-13. FIGURE 10-12: ...
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... The first 64 locations and the last location (OSCCAL) can be read, regardless of the code protection bit setting. The last memory location can be read regardless of the code protection bit setting on the PIC12F510/16F506 devices. 10.11 ID Locations Four memory locations are designated as ID locations where the user can store checksum or other code identification numbers ...
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... After Reset, a 6-bit command is supplied to the device. Depending on the command and if the command was a Load or a Read, 14 bits of program data are then sup- plied to or from the device. For complete details of serial programming, please refer to the PIC12F510/16F506 Programming Specifications. A typical In-Circuit Serial Programming connection is shown in Figure 10-15. ...
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... In the set of italics User defined term (font is courier) © 2007 Microchip Technology Inc. PIC12F510/16F506 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...
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... PIC12F510/16F506 TABLE 11-2: INSTRUCTION SET SUMMARY Mnemonic, Description Operands ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW – Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 IORWF ...
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... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2007 Microchip Technology Inc. PIC12F510/16F506 BCF Bit Clear f Syntax: [ label ] BCF f,b 0 ≤ ...
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... PIC12F510/16F506 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b 0 ≤ f ≤ 31 Operands: 0 ≤ b < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘1’, then the next instruction is skipped. If bit ‘b’ is ‘1’, then the next instruc- ...
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... GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS <6:5>. GOTO is a two- cycle instruction. © 2007 Microchip Technology Inc. PIC12F510/16F506 INCF Increment f Syntax: [ label ] INCF f,d 0 ≤ f ≤ 31 Operands: d ∈ ...
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... PIC12F510/16F506 IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d 0 ≤ f ≤ 31 Operands: d ∈ [0,1] (W).OR. (f) → (dest) Operation: Status Affected: Z Description: Inclusive OR the W register with register ‘f’. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘ ...
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... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C © 2007 Microchip Technology Inc. PIC12F510/16F506 SLEEP Enter SLEEP Mode Syntax: [label ] SLEEP Operands: None 00h → ...
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... PIC12F510/16F506 TRIS Load TRIS Register Syntax: [ label ] TRIS f Operands (W) → TRIS register f Operation: Status Affected: None Description: TRIS register ‘f’ loaded with the contents of the W register XORLW Exclusive OR literal with W Syntax: [label ] XORLW k 0 ≤ k ≤ 255 Operands: (W) .XOR. k → (W) ...
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... MPLAB PM3 Device Programmer - PICkit™ 2 Development Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2007 Microchip Technology Inc. PIC12F510/16F506 12.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...
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... PIC12F510/16F506 12.2 MPASM Assembler The MPASM Assembler is a full-featured, universal macro assembler for all PIC MCUs. The MPASM Assembler generates relocatable object files for the MPLINK Object Linker, Intel files, MAP files to detail memory usage and symbol reference, absolute LST files that contain source lines and generated machine code and COFF files for debugging ...
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... Microchip Technology Inc. PIC12F510/16F506 12.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, low-cost, ...
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... PIC12F510/16F506 12.11 PICSTART Plus Development Programmer The PICSTART Plus Development Programmer is an easy-to-use, low-cost, prototype programmer. It connects to the PC via a COM (RS-232) port. MPLAB Integrated Development Environment software makes using the programmer simple and efficient. The PICSTART Plus Development Programmer supports most PIC devices in DIP packages pins. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2007 Microchip Technology Inc. PIC12F510/16F506 ............................................................................... -0. )...................................................................................................................± ...........................................................................................................± ...
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... PIC12F510/16F506 VOLTAGE-FREQUENCY GRAPH, -40°C ≤ T FIGURE 13-1: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC12F510) FIGURE 13- EXTRC INTOSC 0 DS41268D-page 84 ≤ +125°C (PIC12F510 Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz MHz © 2007 Microchip Technology Inc. ...
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... VOLTAGE FREQUENCY GRAPH, -40°C ≤ T FIGURE 13-3: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC16F506) FIGURE 13- EXTRC INTOSC © 2007 Microchip Technology Inc. PIC12F510/16F506 ≤ +125°C (PIC16F506 Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz MHz DS41268D-page 85 ...
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... PIC12F510/16F506 13.1 DC Characteristics: PIC12F510/16F506 (Industrial) DC Characteristics Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3,4) D010 I Supply Current DD D020 I Power-down Current PD (5) ...
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... DC Characteristics: PIC12F510/16F506 (Extended) DC Characteristics Param Sym Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset (3,4) D010 I Supply Current DD D020 I Power-down Current PD (5) D022 ...
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... Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input not recommended that the PIC12F510/16F506 be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level ...
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... COMPARATOR VOLTAGE REFERENCE (CV Sym Characteristics CV Resolution RES Absolute Accuracy Unit Resistor Value (R) (1) Settling Time * These parameters are characterized but not tested. Note 1: Settling time measured while V TABLE 13-3: A/D CONVERTER CHARACTERISTICS (PIC16F506/PIC12F510) Param Sym Characteristic No. A01 N Resolution R A03 E Integral Error IL A04 E ...
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... PIC12F510/16F506 13.4 Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase (pp) and their meanings CLKOUT cy Cycle Time drt Device Reset Timer io I/O port Uppercase letters and their meanings: ...
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... When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices. © 2007 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40°C ≤ T ...
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... PIC12F510/16F506 TABLE 13-5: CALIBRATED INTERNAL RC FREQUENCIES AC CHARACTERISTICS Param Sym Characteristic No. F10 F Internal Calibrated INTOSC OSC (1) Frequency * These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested ...
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... I/O pin Note 1: I/O pins must be taken out of High-Impedance mode by enabling the output drivers in software. 2: Runs in MCLR or WDT Reset only in XT, LP and HS modes. © 2007 Microchip Technology Inc. PIC12F510/16F506 -40°C ≤ T ≤ +85°C (industrial) A -40°C ≤ T ≤ +125°C (extended) ...
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... PIC12F510/16F506 TABLE 13-7: RESET, WATCHDOG TIMER AND DEVICE RESET TIMER AC CHARACTERISTICS Param Sym Characteristic No MCLR Pulse Width (low Watchdog Timer Time-out Period WDT (No Prescaler Device Reset Timer Period DRT Standard Short 34 T I/O high-impedance from MCLR low IOZ * These parameters are characterized but not tested. ...
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... RB0 (GP0)/RB1 (GP1) 2.0 - 125 5.5 - 125 RB3 (GP3) 2.0 - 125 5.5 - 125 © 2007 Microchip Technology Inc. PIC12F510/16F506 Min Typ 73K 105K 73K 113K 82K 123K 86K 132k 15K 21K 15K 22K 19K 26k 23K 29K 63K 81K 77K 93K ...
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... PIC12F510/16F506 NOTES: DS41268D-page 96 © 2007 Microchip Technology Inc. ...
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... OVER 1,400 Typical: Statistical Mean @25°C 1,200 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 1,000 800 600 400 200 0 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 OSC XT Mode 4 MHz 4 MHz 3.0 3.5 4.0 4 Maximum Typical 5.0 5.5 DS41268D-page 97 ...
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... PIC12F510/16F506 FIGURE 14-2: TYPICAL I PD 0.45 Typical: Statistical Mean @25°C 0.40 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.0 2.0 2.5 FIGURE 14-3: MAXIMUM I PD 18.0 Typical: Statistical Mean @25°C 16.0 Maximum: Mean (Worst-Case Temp) + 3σ ...
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... FIGURE 14-5: TYPICAL WDT Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ 7 (-40°C to 125° 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 vs. V (COMPARATOR ENABLED 3.0 3.5 4.0 V ( 3.0 3.5 4.0 V (V) DD Maximum Typical 4 ...
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... PIC12F510/16F506 FIGURE 14-6: MAXIMUM WDT I 25.0 Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 20.0 15.0 10.0 5.0 0.0 2.0 2.5 FIGURE 14-7: WDT TIME-OUT vs Max. 125° Max. 85° Typical. 25° Min. -40° 2.0 2.5 DS41268D-page 100 vs ...
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... Microchip Technology Inc. PIC12F510/16F506 = 3.0V) DD (VDD = 3V, -40×C TO 125×C) Max. 125°C Max. 85°C Typical 25°C Min. -40°C 6.5 7.0 7.5 8.0 8.5 ...
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... PIC12F510/16F506 FIGURE 14-10: V vs. I OVER TEMPERATURE ( 3.5 3.0 2.5 2.0 1.5 Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ 1.0 (-40°C to 125°C) 0.5 0.0 0.0 -0.5 -1.0 FIGURE 14-11: V vs. I OVER TEMPERATURE ( 5.5 5.0 4.5 4.0 Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-Case Temp) + 3σ ...
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... Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 3.0 2.5 2.0 1.5 1.0 0.5 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 vs (TTL Input, -40×C TO 125×C) Max. -40°C Typ. 25°C Min. 125°C 3.0 3.5 4 ...
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... PIC12F510/16F506 FIGURE 14-14: DEVICE RESET TIMER (HS, XT AND LP) vs 2.0 2.5 Note: See Table 13-7 if another clock mode is selected. DS41268D-page 104 DD Maximum (Sleep Mode all Peripherals Disabled) Max. 125°C Max. 85°C Typical 25°C Min. -40°C 3.0 3.5 4.0 V (V) DD 4.5 5 ...
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... PIC device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2007 Microchip Technology Inc. PIC12F510/16F506 Example 12F510/P 017 0410 Example PIC16F506-I/P 0410017 Example PIC12F510-I /SN0410 017 Example Marking BS0 BT0 e 3 ...
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... PIC12F510/16F506 15.2 Package Marking Information (Cont’d) 14-Lead SOIC (3.90 mm) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 8-Lead MSOP XXXXXX YWWNNN 14-Lead TSSOP (4.4 mm) XXXXXXXX YYWW NNN DS41268D-page 106 Example PIC16F506 -I/SL 0410017 Example 602/MS 310017 Example 16F506/ST 0410 017 © 2007 Microchip Technology Inc. ...
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... N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 DS41268D-page 107 ...
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... PIC12F510/16F506 N NOTE DS41268D-page 108 © 2007 Microchip Technology Inc. ...
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... N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 φ α c β DS41268D-page 109 ...
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... PIC12F510/16F506 DS41268D-page 110 © 2007 Microchip Technology Inc. ...
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... D N NOTE TOP VIEW A3 © 2007 Microchip Technology Inc. PIC12F510/16F506 EXPOSED PAD BOTTOM VIEW A NOTE NOTE DS41268D-page 111 ...
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... PIC12F510/16F506 N NOTE DS41268D-page 112 φ α c β © 2007 Microchip Technology Inc. ...
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... D N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 φ L DS41268D-page 113 ...
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... PIC12F510/16F506 D N NOTE DS41268D-page 114 © 2007 Microchip Technology Inc. φ L ...
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... Original release. Revision B Page 3 – Special Microcontroller Features and Low- Power Features sections. PIC12F510 Pin Diagram. Section 3.0 – Figure 3-1, Figure 3-2, Table 3-2, Table 3-3. Section 4.0 – First paragraph, Section 4.2 - Figure references, Tables 4-1 and 4-2 (Note 1). ...
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... PIC12F510/16F506 NOTES: DS41268D-page 116 © 2007 Microchip Technology Inc. ...
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... INDEX A ALU ....................................................................................... 9 Assembler MPASM Assembler..................................................... 80 B Block Diagram Comparator for the PIC12F510................................... 46 Comparator for the PIC16F506................................... 46 On-Chip Reset Circuit ................................................. 64 Timer0......................................................................... 39 TMR0/WDT Prescaler................................................. 42 Watchdog Timer.......................................................... 67 Brown-Out Protection Circuit .............................................. Compilers MPLAB C18 ................................................................ 80 MPLAB C30 ................................................................ 80 Carry ..................................................................................... 9 Clocking Scheme ................................................................ 14 Code Protection ............................................................ 55, 69 Configuration Bits................................................................ 55 Configuration Word (PIC12F510) ....................................... 56 Configuration Word (PIC16F506) ...
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... PIC12F510/16F506 T Timer0 Timer0 ......................................................................... 39 Timer0 (TMR0) Module ............................................... 39 TMR0 with External Clock........................................... 41 Timing Diagrams and Specifications................................... 91 Timing Parameter Symbology and Load Conditions........... 91 TRIS Registers.................................................................... 27 W Wake-up from Sleep ........................................................... 69 Watchdog Timer (WDT) ................................................ 55, 66 Period.......................................................................... 66 Programming Considerations ..................................... 66 WWW Address.................................................................. 108 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41268D-page 118 © ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2007 Microchip Technology Inc. PIC12F510/16F506 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC12F510/16F506 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... PIC16F506-I/SN = Industrial Temp., SOIC package c) PIC16F506T-E/P = Extended Temp., PDIP package, Tape and Reel (Industrial) (Extended) (3, 4) (3, 4) Note 1: (4) (4) 2: (4) ( tape and reel SOIC and TSSOP packages only tape and reel SOIC and MSOP packages only. PIC12F510 only. Pb-free. DS41268D-page 121 ...
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... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...