20-668-0011 Rabbit Semiconductor, 20-668-0011 Datasheet - Page 118
20-668-0011
Manufacturer Part Number
20-668-0011
Description
IC MPU RABIT3000A 55.5MHZ128LQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0011.pdf
(312 pages)
Specifications of 20-668-0011
Processor Type
Rabbit 3000 8-Bit
Speed
55.5MHz
Voltage
2.5V, 2.7V, 3V, 3.3V
Mounting Type
Surface Mount
Package / Case
128-LQFP
Data Bus Width
8 bit
Maximum Clock Frequency
55.5 MHz
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Number Of Programmable I/os
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
316-1061
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Part Number:
20-668-0011
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Rabbit Semiconductor
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can generate interrupts, but the timers themselves cannot. Furthermore, these timers can-
not be cascaded with Timer A1.
The individual Timer A capabilities are summarized in the table below. There is a bit in
the control/status register to disable all ten timers globally.
There is one interrupt vector for Timer A and a common interrupt priority. A common status
register (TACSR) has bits for Timers A1–A7 that indicate if the output pulse for that timer
has taken place since the last read of the status register. These bits are cleared when the status
register is read. No bit will be lost. Either it will be read by the status register read or it will
be set after the status register read is complete. If a bit is on and the corresponding interrupt
is enabled, an interrupt will occur when priorities allow. However, a separate interrupt is not
guaranteed for each bit with an enabled interrupt. If the bit is read in the status register, it is
cleared and no further interrupt corresponding to that bit will be requested. It is possible that
one bit will cause an interrupt, and then one or more additional bits will be set before the sta-
tus register is read. After these bits are cleared, they cannot cause an interrupt. The proper
rule to follow is for the interrupt routine to handle all bits that it sees set.
108
Timer
A10
A1
A2
A3
A4
A5
A6
A7
A8
A9
Cascade
from A1
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
Interrupt
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
Parallel Ports D–G, Timer B
Rabbit 3000 Microprocessor User’s Manual
Associated Peripheral
Pulse-Width Modulator
Quadrature Decoder
Input Capture
Serial Port A
Serial Port B
Serial Port C
Serial Port D
Serial Port E
Serial Port F
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