20-668-0011 Rabbit Semiconductor, 20-668-0011 Datasheet - Page 137
20-668-0011
Manufacturer Part Number
20-668-0011
Description
IC MPU RABIT3000A 55.5MHZ128LQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0011.pdf
(312 pages)
Specifications of 20-668-0011
Processor Type
Rabbit 3000 8-Bit
Speed
55.5MHz
Voltage
2.5V, 2.7V, 3V, 3.3V
Mounting Type
Surface Mount
Package / Case
128-LQFP
Data Bus Width
8 bit
Maximum Clock Frequency
55.5 MHz
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Number Of Programmable I/os
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
316-1061
Available stocks
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Manufacturer
Quantity
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Company:
Part Number:
20-668-0011
Manufacturer:
Rabbit Semiconductor
Quantity:
10 000
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17.3 Operation
17.3.1 Asynchronous Mode
The following steps explain how to set up Serial Ports A – D for asynchronous operation.
The serial ports can be used by polling the status byte, but their performance will be better
with an interrupt. These instructions also apply to the asynchronous operation of Serial
Ports E – F.
1. Write the interrupt vector for the interrupt service routine to the internal interrupt table.
2. Set up the desired transmit pin by writing to the appropriate parallel port function register
3. Select the appropriate mode by writing to SxCR (receive input port and 7 or 8 bits).
4. Select additional options by writing to SxER (parity, RZI encoding, clock polarity, and
5. Write the desired divider value to TATxR for the appropriate serial port.
A sample asynchronous serial interrupt handler is shown below for Serial Port A.
To transmit with an address (1) bit appended, write the data to SxAR instead of SxDR; to
append a long stop (0) bit write to SxLR instead.
Chapter 17 Serial Ports A – D
(PCFR or PDFR).
Also select the interrupt priority.
behavior during break).
async_sera_isr::
rx_ready:
check_for_tx:
done:
push af
ioi ld a, (SASR)
bit 7,a
push af
jr
ioi ld a, (SADR)
; do something with byte here
pop af
bit 3,a
jr nz, done
; get next byte to be transmitted into A here
ioi ld (SADR), a
pop af
ipres
ret
z, check_for_tx
; save used registers
; get status
; check if byte ready in RX buffer
; save status for next check
; read byte and clear interrupt
; check if TX buffer was emptied
; load next byte into TX buffer and clear interrupt
; restore used registers
127
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