Z85C3010PSG Zilog, Z85C3010PSG Datasheet - Page 56

• Manufacturer Part Number: Z85C3010PSG
• Description: IC 10MHZ Z8500 CMOS SCC 40-DIP
• Manufacturer: Zilog
• Series: SCCr

Specifications of Z85C3010PSG

• Processor Type: Z80
• Features: Error Detection and Multiprotocol Support
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Cpu Speed: 8MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 85
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3934; Z85C3010PSG

Table 7. Z85C30 General Timing Table (continued)
PS011705-0608
No
6
7
8
9
10
11
12
13
14a
14b
15a
15b
16a
16b
17
18
19
20
21
22
a. RxC is RTxC or TRxC, whichever is supplying the receive clock.
b. Synchronization of RxC to PCLK is eliminated in divide by four operation.
c. Parameter applies only to FM encoding/decoding.
d. TxC is TRxC or /RTxC, whichever is supplying the transmit clock.
e. External PCLK to RTxC or TxC synchronization requirement eliminated for PCLK divide-by-four operation.TRxC
and RTxC rise and fall times are identical to PCLK. Reference timing specs TfPC and TrPC.Tx and Rx input clock
slew rates should be kept to a maximum of 30 nsec. All parameters related to input CLK edges must be referenced at
the point at which the transition begins or ends, whichever is worst case.
f. Parameter applies only for transmitter and receiver; DPLL and Baud Rate Generator timing requirements are
identical to case PCLK requirements.
g. Enhanced Feature — RTxC used as input to internal DPLL only.
h. The maximum receive or transmit data rate is 1/4 PCLK.
i. Both RTxC and SYNC have 30 pF capacitors to ground connections.
Symbol
TsRXD(RXCf)
ThRXD(RXCf)
TsSY(RXC)
ThSY(RXC)
TsTXC(PC)
TdTXCf(TXD)
TdTxCr(TXD)
TdTXD(TRX)
TwRTXh
TwRTXh(E)
TwRTXI
TwRTXI(E)
TcRTX
TcRTX(E)
TcRTXX
TwTRXh
TwEXT
TwTRXI
TcTRX
TwSY
Parameter
RxD to /RXC Setup Time
RxD to /RXC Hold Time
SYNC to RxC Setup Time
SYNC to RxC Hold Time
TxC to PCLK Setup Time
TxC to TxD Delay
TxC to TxD Delay
TxD to TRxC Delay
RTxC High Width
RTxC High Width
TRxC Low Width
RTxC Low Width
RTxC Cycle Time
RTxC Cycle Time
Crystal Osc. Period
TRxC High Width
TRxC Low Width
TRxC Cycle Time
DCD or CTS Pulse Width
SYNC Pulse Width
7
6
6
f
g
6
6,
7
6,8
4
4,3
h
i
1,3
1
1,c
CMOS SCC Serial Communications Controller
d,e
1
8.5 MHz
Min
0
150 1
-200
5TcPc
N/A
150
50
150
50
488
125
125
150
150
488
200
200
Max
200
200
1000
200
Min
5TcPc
N/A
120
120
10 MHz
0
25
-150
120
40
120
40
400
100
100
120
120
400
Product Specification
Electrical Characteristics
Max Min
150
150
140
1000 62
16 MHz
0
50
-100
5TcPc
N/A
80
15.6
80
15.6
244
31.25
180
80
244
70
70
Max
80
80
80
1000
52