Z8S18020PSG Zilog, Z8S18020PSG Datasheet - Page 48

• Manufacturer Part Number: Z8S18020PSG
• Description: IC Z180 MPU 64-DIP
• Manufacturer: Zilog

Specifications of Z8S18020PSG

• Processor Type: Z180
• Features: Enhanced Z180
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8S180X
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 3.3 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Development Tools By Supplier: Z8S18000ZEM
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4301; Z8S18020PSG

to
The Timer Control Register (
(
rements to
interrupt request if enabled by
when
is read. During
rements to
interrupt request if enabled by
when
is read. During
ister is
1
,
is reset to
and
,
control the output of
1
, the
is read and the higher or lower byte of
is read and the higher or lower byte of
0
0
pin as indicated in Table 12. During
,
,
is cleared to
)
1
0
, the interrupt request is inhibited. During
generates a CPU interrupt request. When
are cleared to
is set to
is set to
function is selected. By programming
,
,
status. It also controls the enabling
0
1
1
.
. This condition generates an
. This condition generates an
is cleared to
is cleared to
0
. If bit 3 of the
) monitors both channels
using the multiplexed
When
1
1
When
.
.
When
0
0
.
.
is reset to
is reset to
is set
dec-
dec-
and
reg-
0
0
,
and disabling of down-counting and interrupts, and controls
the output pin
Low, or toggled when
and
and
1
written.
, down-counting is stopped and
and
does not decrement until
enable and disable down-counting for
, respectively. When
and
, the
are cleared to
for
decrements to
pin can be forced High,
.
0
(
during
is set to .
is freely read or
0
, ) is set to
.
ZiLOG
and