MPC8321VRADDC Freescale Semiconductor, MPC8321VRADDC Datasheet - Page 21

• Manufacturer Part Number: MPC8321VRADDC
• Description: IC MPU PWRQUICC II 516-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8321VRADDC

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 266MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8323E-MDS-PB
• Maximum Clock Frequency: 266 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 266MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 516
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 7
8.2.1.2
Table 24
Freescale Semiconductor
At recommended operating conditions with OV
At recommended operating conditions with OV
TX_CLK data clock fall time
Note:
1. The symbols used for timing specifications follow the pattern of t
RX_CLK clock period 10 Mbps
RX_CLK clock period 100 Mbps
RX_CLK duty cycle
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise time
inputs and t
timing (MT) for the time t
the clock reference symbol representation is based on two to three letters representing the clock of a particular functional.
For example, the subscript of t
used with the appropriate letter: R (rise) or F (fall).
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
shows the MII transmit AC timing diagram.
provides the MII receive AC timing specifications.
(first two letters of functional block)(reference)(state)(signal)(state)
MII Receive AC Timing Specifications
Parameter/Condition
TXD[3:0]
TX_CLK
Parameter/Condition
TX_EN
TX_ER
Table 23. MII Transmit AC Timing Specifications (continued)
MTX
clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in general,
MTX
Table 24. MII Receive AC Timing Specifications
represents the MII(M) transmit (TX) clock. For rise and fall times, the latter convention is
Figure 7. MII Transmit AC Timing Diagram
t
MTXH
DD
DD
of 3.3 V ± 10%.
of 3.3 V ± 10%.
t
MTX
t
Symbol
t
MTKHDX
t
MRXH
Symbol
MTXF
t
t
t
MRDVKH
MRDXKH
MTXF
t
(first two letters of functional block)(signal)(state)(reference)(state)
t
t
MRXR
for outputs. For example, t
MRX
MRX
/t
MRX
1
1
t
MTXR
10.0
10.0
Min
Min
1.0
1.0
35
—
—
Typical
Typical
MTKHDX
400
40
—
—
—
—
—
Ethernet and MII Management
symbolizes MII transmit
Max
Max
4.0
4.0
65
—
—
—
—
Unit
Unit
ns
ns
ns
ns
ns
ns
%
for
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