MPC8321VRADDC Freescale Semiconductor, MPC8321VRADDC Datasheet - Page 25

• Manufacturer Part Number: MPC8321VRADDC
• Description: IC MPU PWRQUICC II 516-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8321VRADDC

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 266MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8323E-MDS-PB
• Maximum Clock Frequency: 266 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 266MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 516
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.3.1
MDC and MDIO are defined to operate at a supply voltage of 3.3 V. The DC electrical characteristics for
MDIO and MDC are provided in
8.3.2
Table 28
Freescale Semiconductor
At recommended operating conditions with OV
Supply voltage (3.3 V)
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input current
MDC frequency
MDC period
MDC clock pulse width high
MDC to MDIO delay
MDIO to MDC setup time
MDIO to MDC hold time
MDC rise time
MDC fall time
Note:
1. The symbols used for timing specifications follow the pattern of t
inputs and t
data timing (MD) for the time t
Also, t
(V) relative to the t
convention is used with the appropriate letter: R (rise) or F (fall).
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
MDDVKH
provides the MII management AC timing specifications.
Parameter/Condition
Parameter
MII Management DC Electrical Characteristics
MII Management AC Electrical Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
Table 27. MII Management DC Electrical Characteristics When Powered at 3.3 V
symbolizes management data timing (MD) with respect to the time data input signals (D) reach the valid state
MDC
clock reference (K) going to the high (H) state or setup time. For rise and fall times, the latter
Table 28. MII Management AC Timing Specifications
MDC
from clock reference (K) high (H) until data outputs (D) are invalid (X) or data hold time.
Symbol
Table
OV
V
V
DD
V
V
I
OH
IN
OL
IH
IL
DD
is 3.3 V ± 10%.
27.
Symbol
t
t
t
MDKHDX
MDDVKH
MDDXKH
t
t
t
I
f
t
MDCH
MDCR
MDHF
OH
I
MDC
MDC
OL
= –1.0 mA
= 1.0 mA
1
0 V ≤ V
Conditions
IN
—
—
—
Min
for outputs. For example, t
(first two letters of functional block)(signal)(state)(reference)(state)
32
10
—
—
—
—
≤ OV
5
0
OV
OV
DD
DD
DD
= Min
= Min
Typical
400
2.5
—
—
—
—
—
—
GND
2.97
2.10
2.00
Min
—
—
MDKHDX
Max
70
10
10
—
—
—
—
—
Ethernet and MII Management
symbolizes management
OV
DD
Max
3.63
0.50
0.80
±5
—
MHz
Unit
+ 0.3
ns
ns
ns
ns
ns
ns
ns
Notes
Unit
μA
—
—
—
—
—
—
—
—
for
V
V
V
V
V
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