MPC8321VRADDC Freescale Semiconductor, MPC8321VRADDC Datasheet - Page 4

• Manufacturer Part Number: MPC8321VRADDC
• Description: IC MPU PWRQUICC II 516-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8321VRADDC

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 266MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8323E-MDS-PB
• Maximum Clock Frequency: 266 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 266MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 516
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Overview
1.1.2
The MPC8323E serial interfaces are as follows:
1.2
The QUICC Engine block is a versatile communications complex that integrates several communications
peripheral controllers. It provides on-chip system design for a variety of applications, particularly in
communications and networking systems. The QUICC Engine block has the following features:
The UCCs are similar to the PowerQUICC II peripherals: SCC (BISYNC, UART, and HDLC bus) and
FCC (fast Ethernet, HDLC, transparent, and ATM).
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MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
Support for one UL2 interface with 31 multi-PHY addresses (MPC8323E and MPC8323 only)
Support for up to three 10/100 Mbps Ethernet interfaces using MII or RMII
Support for up to four T1/E1/J1/E3 or DS-3 serial interfaces (TDM)
Support for dual UART and SPI interfaces and a single I
One 32-bit RISC controller for flexible support of the communications peripherals
Serial DMA channel for receive and transmit on all serial channels
Five universal communication controllers (UCCs) supporting the following protocols and
interfaces (not all of them simultaneously):
— 10/100 Mbps Ethernet/IEEE 802.3® standard
— IP support for IPv4 and IPv6 packets including TOS, TTL, and header checksum processing
— ATM protocol through UTOPIA interface (note that the MPC8321 and MPC8321E do not
— HDLC /transparent up to 70-Mbps full-duplex
— HDLC bus up to 10 Mbps
— Asynchronous HDLC
— UART
— BISYNC up to 2 Mbps
— QUICC multi-channel controller (QMC) for 64 TDM channels
One UTOPIA interface (UPC1) supporting 31 multi-PHYs (MPC8323E- and MPC8323-specific)
Two serial peripheral interfaces (SPI). SPI2 is dedicated to Ethernet PHY management.
Four TDM interfaces
Thirteen independent baud rate generators and 19 input clock pins for supplying clocks to UCC
serial channels
Four independent 16-bit timers that can be interconnected as two 32-bit timers
QUICC Engine Block
support the UTOPIA interface)
Serial Interfaces
2
C interface
Freescale Semiconductor