MPC8321VRADDC Freescale Semiconductor, MPC8321VRADDC Datasheet - Page 71

• Manufacturer Part Number: MPC8321VRADDC
• Description: IC MPU PWRQUICC II 516-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8321VRADDC

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 266MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8323E-MDS-PB
• Maximum Clock Frequency: 266 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 32KB
• Cpu Speed: 266MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 516
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22.7
To simplify the PLL configurations, the MPC8323E might be separated into two clock domains. The first
domain contain the CSB PLL and the core PLL. The core PLL is connected serially to the CSB PLL, and
has the csb_clk as its input clock. The second clock domain has the QUICC Engine PLL. The clock
domains are independent, and each of their PLLs are configured separately. Both of the domains has one
common input clock.
23 Thermal
This section describes the thermal specifications of the MPC8323E.
23.1
Table 64
Freescale Semiconductor
Junction-to-ambient natural convection
Junction-to-ambient natural convection
Junction-to-ambient (@200 ft/min)
Junction-to-ambient (@200 ft/min)
Junction-to-board
Junction-to-case
Conf No.
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
1
2
3
4
5
6
provides the package thermal characteristics for the 516 27 × 27 mm PBGA of the MPC8323E.
Suggested PLL Configurations
Thermal Characteristics
SPMF
Characteristic
0100
0100
0010
0100
0101
0010
Table 63
0000100
0000101
0000100
0000101
0000101
0000101
Core
PLL
Table 64. Package Thermal Characteristics for PBGA
shows suggested PLL configurations for 33, 25, and 66 MHz input clocks.
Table 63. Suggested PLL Configurations
CEMF
0110
1000
0011
0110
1000
0011
Four-layer board (2s2p)
Four-layer board (2s2p)
Single-layer board (1s)
Single-layer board (1s)
CEDF
0
0
0
0
0
0
Board type
—
—
Input Clock
Frequency
(MHz)
33.33
66.67
33.33
66.67
25
25
Frequency
Symbol
R
R
R
R
R
R
133.33
133.33
133.33
133.33
(MHz)
θJMA
θJMA
CSB
θJC
θJA
θJA
θJB
100
125
Value
Frequency
28
21
23
18
13
9
266.66
266.66
333.33
333.33
(MHz)
312.5
Core
250
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
Frequency
Engine
QUICC
(MHz)
200
200
200
200
200
200
1, 2, 3
Notes
Thermal
1, 2
1, 3
1, 3
4
5
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