MPC8321VRADDC Freescale Semiconductor, MPC8321VRADDC Datasheet - Page 8

IC MPU PWRQUICC II 516-PBGA

MPC8321VRADDC

Manufacturer Part Number
MPC8321VRADDC
Description
IC MPU PWRQUICC II 516-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheet

Specifications of MPC8321VRADDC

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
266MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
516-PBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8323E-MDS-PB
Maximum Clock Frequency
266 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
266MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
BGA
No. Of Pins
516
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8321VRADDC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8321VRADDC
Manufacturer:
FREESCALE
Quantity:
20 000
Electrical Characteristics
2.1.3
Table 3
preliminary estimates.
2.1.4
Table 4
2.2
The device does not require the core supply voltage (V
be applied in any particular order. Note that during power ramp-up, before the power supplies are stable
and if the I/O voltages are supplied before the core voltage, there might be a period of time that all input
and output pins are actively driven and cause contention and excessive current. In order to avoid actively
driving the I/O pins and to eliminate excessive current draw, apply the core voltage (V
voltage (GV
where the core voltage is applied first, the core voltage supply must rise to 90% of its nominal value before
the I/O supplies reach 0.7 V; see
stable, wait for a minimum of 32 clock cycles before negating PORESET.
Note that there is no specific power down sequence requirement for the device. I/O voltage supplies
(GV
8
Input capacitance for all pins except CLKIN
Input capacitance for CLKIN
Note:
1. The external clock generator should be able to drive 10 pF.
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
DD
provides information on the characteristics of the output driver strengths. The values are
describes the input capacitance for the CLKIN pin in the MPC8323E.
and OV
Power Sequencing
Output Driver Characteristics
Input Capacitance Specification
DD
Local bus interface utilities signals
PCI signals
DDR1 signal
DDR2 signal
DUART, system control, I2C, SPI, JTAG
GPIO signals
and OV
DD
Parameter/Condition
) do not have any ordering requirements with respect to one another.
DD
Driver Type
) and assert PORESET before the power supplies fully ramp up. In the case
Figure
Table 4. Input Capacitance Specification
Table 3. Output Drive Capability
3. Once both the power supplies (I/O voltage and core voltage) are
Output Impedance
Symbol
C
DD
ICLKIN
C
I
) and IO supply voltages (GV
(Ω)
42
25
18
18
42
42
Min
10
6
OV
GV
GV
OV
OV
Max
Voltage
Supply
DD
DD
DD
DD
DD
8
= 3.3 V
= 3.3 V
= 3.3 V
= 2.5 V
= 1.8 V
Freescale Semiconductor
DD
DD
) before the I/O
Unit
and OV
pF
pF
Notes
DD
1
) to

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