MPC8241LZQ200D Freescale Semiconductor, MPC8241LZQ200D Datasheet - Page 46

• Manufacturer Part Number: MPC8241LZQ200D
• Description: IC MPU 32BIT 200MHZ PPC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8241LZQ200D

• Processor Type: MPC82xx PowerQUICC II 32-bit
• Speed: 200MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: MPC82XX
• Device Core: PowerQUICC II
• Device Core Size: 32b
• Frequency (max): 200MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

System Design Information
46
Notes:
Physical Pin Out
COP Connector
1. QACK is an output and is not required at the COP header for emulation.
2. RUN/STOP normally on pin 5 of the COP header is not implemented on the MPC8241.
3. CKSTP_OUT normally on pin 15 of the COP header is not implemented on the MPC8241.
4. Pin 14 is not physically present on the COP header.
5. SRESET functions as output SDMA12 in extended ROM mode.
6. CHKSTOP_IN functions as output SDMA14 in extended ROM mode.
7. The COP port and target board should be able to independently assert HRESET and TRST to
.
8. If the JTAG interface is implemented, connect HRESET from the target source to TRST from the COP
13
15
11
Connect pin 5 of the COP header to OV
Connect pin 15 of the COP header to OV
the processor to fully control the processor as shown.
header through an AND gate to TRST of the part. If the JTAG interface is not implemented, connect
HRESET from the target source to TRST of the part through a 0-Ω isolation resistor.
1
1
3
5
7
9
No pin
KEY
Board Sources
10
12
16
2
4
6
8
From Target
(if any)
MPC8241 Integrated Processor Hardware Specifications, Rev. 10
Key
SRESET
HRESET
15
14
5
13
11
10
12
16
4
6
2
2
3
4
1
3
7
8
9
Figure 27. COP Connector Diagram
TDO
VDD_SENSE
SRESET
TRST
TMS
TDI
TCK
HRESET
CHKSTOP_IN
NC
NC
NC
5
7
5
DD
DD
with a 1- kΩ pull-up resistor.
6
with a 10-kΩ pull-up resistor.
10 kΩ
1 kΩ
0 Ω
8
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
OV
OV
OV
OV
TDO
HRST_CTRL
OV
OV
CHKSTOP_IN
TMS
TDI
TCK
HRST_CPU
OV
QACK
SRESET
OV
TRST
MPC8241
DD
DD
DD
DD
DD
DD
DD
DD
7
1
5
Freescale Semiconductor
6