MPC5200CVR400B Freescale Semiconductor, MPC5200CVR400B Datasheet - Page 10

• Manufacturer Part Number: MPC5200CVR400B
• Description: IC MPU 32BIT 400MHZ 272-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC5200CVR400B

• Processor Type: MPC52xx PowerPC 32-Bit
• Speed: 400MHz
• Voltage: 1.5V
• Mounting Type: Surface Mount
• Package / Case: 272-PBGA
• Processor Series: MPC52xx
• Core: e300
• Development Tools By Supplier: MEDIA5200KIT1E
• Maximum Clock Frequency: 400 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 2.5 V, 3.3 V
• Minimum Operating Temperature: - 40 C
• Core Size: 32 Bit
• No. Of I/o's: 56
• Ram Memory Size: 16KB
• Cpu Speed: 400MHz
• No. Of Timers: 8
• Embedded Interface Type: CAN, I2C, SCI, SPI
• No. Of Pwm Channels: 8
• Digital Ic Case Style: TEPBGA
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical and Thermal Characteristics
where N is the number of output pins switching in a group M, C is the capacitance per pin, VDD_IO is the
IO voltage swing, f is the switching frequency and PIOint is the power consumed by the unloaded IO stage.
The total power consumption of the MPC5200 processor must not exceed the value, which would cause
the maximum junction temperature to be exceeded.
10
NOTES:
1
2
3
4
5
6
7
8
9
Deep-Sleep
Operational
Typical core power is measured at VDD_CORE = 1.5 V, Tj = 25 C
Operational power is measured while running an entirely cache-resident program with floating-point
multiplication instructions in parallel with a continuous PCI transaction via BestComm.
Doze power is measured with the G2_LE core in Doze mode, the system oscillator, System PLL and Core PLL
are active, all other system modules are inactive
Nap power is measured with the G2_LE core in Nap mode, the stem oscillator, System PLL and Core PLL are
active, all other system modules are inactive
Sleep power is measured with the G2_LE core in Sleep mode, the stem oscillator, System PLL and Core PLL
are active, all other system modules are inactive
Deep-Sleep power is measured with the G2_LE core in Sleep mode, the stem oscillator, System PLL, Core PLL
and all other system modules are inactive
Typical PLL power is measured at SYS_PLL_AVDD = CORE_PLL_AVDD = 1.5 V, Tj = 25 C
IO power figures given in the table represent the worst case scenario. For the mem_io rail connected to 2.5V the
IO power is expected to be lower and bounded by the worst case with VDD_MEM_IO connected to 3.3V.
Unloaded typical I/O power is measured in Deep-Sleep mode at VDD_IO = VDD_MEM_IO
Typical
Typical
Mode
Sleep
Mode
Mode
Doze
Nap
PLL Power Supplies (SYS_PLL_AVDD, CORE_PLL_AVDD)
Unloaded I/O Power Supplies (VDD_IO, VDD_MEM_IO
33/66/33/33/264
727.5
SYS_XTAL/XLB/PCI/IPG/CORE (MHz)
52.5
Typ
—
—
—
Core Power Supply (VDD_CORE)
P total
Table 6. Power Dissipation
MPC5200 Data Sheet, Rev. 4
Typ
Typ
=
33
2
P core
33/132/66/132/396
+
P analog
1080
52.5
Typ
600
225
225
+
P IO
8
)
Unit
Unit
Unit
mW
mW
mW
mW
mW
mW
mW
SDR
Notes
Notes
Notes
Freescale Semiconductor
1
1
1
1
1
= 3.3 V, Tj = 25 C
,
7
9
,
,
,
,
2
3
4
5
6
SpecID
D5.1
D5.2
D5.3
D5.4
D5.5
D5.6
D5.7