MPC5200CVR400B Freescale Semiconductor, MPC5200CVR400B Datasheet - Page 73

IC MPU 32BIT 400MHZ 272-PBGA

MPC5200CVR400B

Manufacturer Part Number
MPC5200CVR400B
Description
IC MPU 32BIT 400MHZ 272-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC5200CVR400B

Processor Type
MPC52xx PowerPC 32-Bit
Speed
400MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
272-PBGA
Processor Series
MPC52xx
Core
e300
Development Tools By Supplier
MEDIA5200KIT1E
Maximum Clock Frequency
400 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
2.5 V, 3.3 V
Minimum Operating Temperature
- 40 C
Core Size
32 Bit
No. Of I/o's
56
Ram Memory Size
16KB
Cpu Speed
400MHz
No. Of Timers
8
Embedded Interface Type
CAN, I2C, SCI, SPI
No. Of Pwm Channels
8
Digital Ic Case Style
TEPBGA
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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VDD_CORE/PLL_AVDD and VDD_IO/VDD_IO_MEM should track up to 0.9 V and then separate for
the completion of ramps with VDD_IO/VDD_IO_MEM going to the higher external voltages. One way
to accomplish this is to use a low drop-out voltage regulator.
5.1.2
If VDD_CORE/PLL_AVDD are powered down first, then sense circuits in the I/O pads will cause all
output drivers to be in a high impedance state. There is no limit on how long after VDD_CORE and
PLL_AVDD power down before VDD_IO or VDD_IO_MEM must power down. VDD_CORE should not
lag VDD_IO, VDD_IO_MEM, or PLL_AVDD going low by more than 0.4V during power down or there
will be undesired high current in the ESD protection diodes. There are no requirements for the fall times
of the power supplies.
The recommended power down sequence is as follows:
5.2
Each of the independent PLL power supplies require filtering external to the device. The following
drawing is a recommendation for the required filter circuit.
5.3
The MPC5200 requires external pull-up or pull-down resistors on certain pins.
5.3.1
The MPC5200 requires pull-down resistors on the test pins TEST_MODE_0, TEST_MODE_1,
TEST_SEL_1.
Freescale Semiconductor
Drop VDD_CORE/PLL_AVDD to 0V.
Drop VDD_IO/VDD_IO_MEM supplies.
System and CPU Core AVDD power supply filtering
Pull-up/Pull-down Resistor Requirements
Power Down Sequence
Pull-down Resistor Requirements for TEST pins
Power
Supply
source
10 Ω
10 µF
Figure 53. Power Supply Filtering
MPC5200 Data Sheet, Rev. 4
200-400 pF
< 1 Ω
AVDD device pin
System Design Information
73

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