MPC8260AZUMHBB Freescale Semiconductor, MPC8260AZUMHBB Datasheet

IC MPU POWERQUICC II 480-TBGA

MPC8260AZUMHBB

Manufacturer Part Number
MPC8260AZUMHBB
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8260AZUMHBB

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
266MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
266 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
No
Rohs Compliant
No
For Use With
MPC8260ADS-TCOM - BOARD DEV ADS POWERQUICC II
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Freescale Semiconductor
Technical Data
MPC8260A
PowerQUICC™ II Integrated
Communications Processor
Hardware Specifications
This document contains detailed information on power
considerations, DC/AC electrical characteristics, and AC
timing specifications for .25μm (HiP4) devices in the
PowerQUICC II™ MPC8260 communications processor
family. These devices include the MPC8260, the MPC8255,
the MPC8264, the MPC8265, and the MPC8266.
Throughout this document, these devices are collectively
referred to as the MPC826xA.
© Freescale Semiconductor, Inc., 2005–2009. All rights reserved.
1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2. Electrical and Thermal Characteristics . . . . . . . . . . . . 7
3. Clock Configuration Modes . . . . . . . . . . . . . . . . . . . 23
4. Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5. Package Description . . . . . . . . . . . . . . . . . . . . . . . . . 46
6. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 48
7. Document Revision History . . . . . . . . . . . . . . . . . . . 48
Document Number: MPC8260AEC
Contents
Rev. 2.0, 06/2009

Related parts for MPC8260AZUMHBB

MPC8260AZUMHBB Summary of contents

Page 1

... These devices include the MPC8260, the MPC8255, the MPC8264, the MPC8265, and the MPC8266. Throughout this document, these devices are collectively referred to as the MPC826xA. © Freescale Semiconductor, Inc., 2005–2009. All rights reserved. Document Number: MPC8260AEC Rev. 2.0, 06/2009 Contents 1 ...

Page 2

... Ports Figure 1. MPC8266 Block Diagram System Interface Unit (SIU) 60x Bus Bus Interface Unit PCI Bus 32 bits MHz 60x-to-PCI 2,3 Bridge or 60x-to-Local Local Bus Bridge 32 bits MHz Memory Controller Clock Counter System Functions 2 SMC2 SPI I C Non-Multiplexed I/O Freescale Semiconductor 2,3 ...

Page 3

... IEEE Std. 1149.1™ standard JTAG test access port • Twelve-bank memory controller — Glueless interface to SRAM, page mode SDRAM, DRAM, EPROM, Flash and other user- definable peripherals — Byte write enables and selectable parity generation MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Features 3 ...

Page 4

... Binary synchronous (BISYNC) communications – Transparent — Two serial management controllers (SMCs), identical to those of the MPC860 – Provide management for BRI devices as general circuit interface (GCI) controllers in time- division-multiplexed (TDM) channels MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 4 Freescale Semiconductor ...

Page 5

... Cell delineation using bit by bit HEC checking and programmable ALPHA and DELTA parameters for the delineation state machine - Payload descrambling using self synchronizing scrambler (programmable by the user) MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor 2 C) controller (identical to the MPC860 I Features ...

Page 6

... Includes all of the configuration registers (which are automatically loaded from the EPROM and used to configure the MPC8265) required by the PCI standard as well as message and doorbell registers — Supports the I O standard 2 MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2 capabilities Freescale Semiconductor ...

Page 7

... VDD/VCCSYN by more than 2.5 V during normal operation. 4 Caution: VIN must not exceed VDDH by more than 2 any time, including during power-on reset. MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 1. Absolute Maximum Ratings Symbol VDD ...

Page 8

... GND (–0.3) – 3.465 – 105 . NOTE: Core, PLL, and I/O Supply Voltages 5% and 0.1 Vdc). – – GND Not to exceed 10 SDRAM_CLK Figure 2. Overshoot/Undershoot Voltage 1 Value Unit 3 4 1.7–2.1 1.9 –2 1.7–2.1 1.9–2 105 °C 5 0–70 ° Freescale Semiconductor ...

Page 9

... XFC, UTOPIA mode, and open drain pins In UTOPIA mode –8 PA[0-31] PB[4-31] PC[0-31] PD[4-31] In UTOPIA mode 8 PA[0-31] PB[4-31] PC[0-31] PD[4-31] MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 3. DC Electrical Characteristics Symbol IHC V ILC VDDH ...

Page 10

... DP(5)/TBEN/IRQ5/EXT_DBG3 DP(6)/CSE(0)/IRQ6 DP(7)/CSE(1)/IRQ7 PSDVAL TA TEA GBL/IRQ1 CI/BADDR29/IRQ2 WT/BADDR30/IRQ3 L2_HIT/IRQ4 CPU_BG/BADDR31/IRQ5 CPU_DBG CPU_BR IRQ0/NMI_OUT IRQ7/INT_OUT/APE PORESET HRESET SRESET RSTCONF QREQ MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2 (continued) Symbol Min Max V — 0.4 OL Freescale Semiconductor Unit V ...

Page 11

... The default configuration of the CPM pins (PA[0–31], PB[4–31], PC[0–31], PD[4–31]) is input. To prevent excessive DC current recommended to either pull unused pins to GND or VDDH configure them as outputs. MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Symbol V ...

Page 12

... MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 12 Symbol Value θ θ θ 1 °C can be obtained from the following °C/W junction to ambient , , . neglected an approximate relationship between P , INT I/O θ Unit Air Flow m/s °C m/s °C/W — °C/W — (1) and D (2) (3) Freescale Semiconductor ...

Page 13

... Test temperature = room temperature ( Watts INT DD DD MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor . Using this value of K the values power supply should be bypassed to ground using at least four CC and ground should be kept to less than half an CC and GND circuits ...

Page 14

... Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings are measured at the pin. MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 14 Table 6. Table 6. Output Buffer Impedances Typical Impedance (Ω) Characteristic Max Delay (ns) Min Delay (ns) 66 MHz 83 MHz 66 MHz 83 MHz 6 5 0.5 Freescale Semiconductor 0.5 1 0.5 0.5 ...

Page 15

... FCC input signals FCC output signals Note: When GFMR[TCI FCC output signals Note: When GFMR[TCI MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 8. AC Characteristics for CPM Inputs Characteristic sp17b sp16b sp36b/sp37b Figure 3. FCC External Clock Diagram ...

Page 16

... Input sampled on the falling edge and output driven on the rising edge. Figure 5. SCC/SMC/SPI/I MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 16 sp17a sp36a/sp37a Figure 4. FCC Internal Clock Diagram 2 C external clock. sp18b sp38b/sp39b 2 C External Clock Diagram sp36a/sp37a sp19b Freescale Semiconductor ...

Page 17

... Input sampled on the rising edge and output driven on the falling edge. 3. Input sampled on the falling edge and output driven on the falling edge. 4. Input sampled on the falling edge and output driven on the rising edge. MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor 2 C internal clock. sp18a ...

Page 18

... MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 18 Sys clk sp22 (See note) (See note) output signals Table 9. AC Characteristics for SIU Inputs Characteristic sp23 sp23 sp22 sp42/sp43 sp42/sp43 sp42a/sp43a 1 Setup (ns) Hold (ns) 66 MHz 83 MHz 66 MHz 83 MHz 6 5 0.5 0 0.5 0 0.5 0 0.5 0 0.5 0.5 Freescale Semiconductor ...

Page 19

... AC timing. When data pipelining is activated, sp12 can be used for data bus setup even when ECC or PARITY are used. Also, sp33a can be used as the AC specification for DP signals. MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Max Delay (ns) Characteristic 66 MHz 83 MHz 66 MHz 83 MHz 6 ...

Page 20

... MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 20 sp11 sp12 sp15 sp31 sp32 sp33a sp35 Figure 9. Bus Signals CLKin sp13 sp14 DP mode input signal DP mode output signal Figure 10. Parity Mode Diagram sp10 sp10 sp10 sp30 sp30 sp30 sp30 sp10 sp10 sp33b/sp30 Freescale Semiconductor ...

Page 21

... CLKin T1 CLKin T1 CLKin T1 Figure 12. Internal Tick Spacing for Memory Controller Signals MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor sp34/sp30 Figure 11. MEMC Mode Diagram NOTE Tick Spacing (T1 Occurs at the Rising Edge of CLKin 1/4 CLKin 1/2 CLKin ...

Page 22

... Notes 0 25 MHz 40 — — — — — — — ns — — — — the midpoint of the signal TCLK (first two letters of functional block)(signal)(state) for outputs. For example, symbolizes JTAG JTDXKH clock reference (K) JTG Freescale Semiconductor — — — ...

Page 23

... MODCK_H–MODCK[1–3] Frequency 0001_000 33 MHz 0001_001 33 MHz 0001_010 33 MHz 0001_011 33 MHz 0001_100 33 MHz MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 13 NOTE Table 13. Clock Default Modes CPM Multiplication CPM Factor Frequency 3 100 MHz 3 100 MHz 4 ...

Page 24

... MHz 5 166 MHz 6 200 MHz 7 233 MHz 8 266 MHz 4 133 MHz 5 166 MHz 6 200 MHz 7 233 MHz 8 266 MHz 4 133 MHz 5 166 MHz 6 200 MHz 7 233 MHz 8 266 MHz 4 133 MHz 5 166 MHz 6 200 MHz 7 233 MHz 8 266 MHz Freescale Semiconductor ...

Page 25

... MHz 0111_010 66 MHz 0111_011 66 MHz 0111_100 66 MHz 0111_101 66 MHz 0111_110 66 MHz 0111_111 66 MHz 1000_000 66 MHz MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor 1 (continued) CPM Multiplication CPM 2,3 2 Factor Frequency Reserved 2 133 MHz 2 133 MHz 2 133 MHz ...

Page 26

... PCI host 1 0 PCI agent 1 NOTE: PCI_MODCK NOTE: Tval (Output Hold) NOTE Core Multiplication Core Factor Frequency 3 200 MHz 3.5 233 MHz 4 266 MHz 4.5 300 MHz are applicable. PCI Clock Frequency Range (MHZ) — 50–66 25–50 50–66 25–50 Freescale Semiconductor ...

Page 27

... MHz 0010_011 33 MHz 3 0011_000 33 MHz 3 0011_001 33 MHz 3 0011_010 33 MHz MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor and Table 17 are for the purpose of illustration only. Users must select CPM Core CPM Multiplication Frequency Factor Factor 2 133 MHz 2 ...

Page 28

... MHz 3/6 66/33 MHz 166 MHz 4/8 50/25 MHz 200 MHz 4/8 50/25 MHz 233 MHz 4/8 50/25 MHz 266 MHz 4/8 50/25 MHz 300 MHz 4/8 50/25 MHz 166 MHz 4/8 58/29 MHz 200 MHz 4/8 58/29 MHz Freescale Semiconductor 2 ...

Page 29

... Frequency Multiplication 2 (PCI) 000 66/33 MHz 001 66/33 MHz 010 66/33 MHz 011 66/33 MHz MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor CPM Core CPM Multiplication Frequency Factor Factor 3.5 233 MHz 3.5 3.5 233 MHz 4 3 ...

Page 30

... MHz 270 MHz 2.5 60 MHz 110MHz 3 44 MHz 132 MHz 3 44 MHz 154 MHz 3 44 MHz 176MHz 3 44 MHz 198 MHz 3 44 MHz 166 MHz 3 66 MHz 200 MHz 3 66 MHz 233 MHz 3 66 MHz 266 MHz 3 66 MHz Freescale Semiconductor 4 4 ...

Page 31

... MHz 1001_001 66/33 MHz 1001_010 66/33 MHz 1001_011 66/33 MHz 1001_100 66/33 MHz 1010_000 66/33 MHz MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor CPM Core CPM Multiplication Frequency 1 Factor Factor 3/6 200 MHz 4.5 5 166 MHz 2 ...

Page 32

... MHz 300 MHz 3 88 MHz 350 MHz 3 88 MHz 400 MHz 3 88 MHz 212MHz 2.5 106 MHz 265 MHz 2.5 106 MHz 318 MHz 2.5 106 MHz 371 MHz 2.5 106 MHz 424 MHz 2.5 106 MHz Table 15. Freescale Semiconductor 4 ...

Page 33

... Figure 13 shows the pinout of the MPC826xA’s 480 TBGA package as viewed from the top surface Not to Scale Figure 13. Pinout of the 480 TBGA Package as Viewed from the Top Surface MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Pinout ...

Page 34

... Indicates that a signal is part of the UTOPIA slave interface. Indicates that a signal is part of the 8-bit UTOPIA interface. Indicates that a signal is part of the 16-bit UTOPIA interface. Indicates that a signal is part of the media independent interface. Table 21. Pinout List Pin Name Pressure Sensitive Adhesive Etched Cavity Copper Traces Meaning Ball Freescale Semiconductor ...

Page 35

... A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 TT0 TT1 TT2 TT3 TT4 TBST TSIZ0 TSIZ1 TSIZ2 TSIZ3 AACK MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 21. Pinout List (continued) Pin Name Ball ...

Page 36

... D30 D31 MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 36 Table 21. Pinout List (continued) Pin Name Ball B20 A18 A16 A13 E12 A20 E17 B15 B13 A11 D19 D17 D15 C13 B11 C19 C17 C15 D13 C11 Freescale Semiconductor ...

Page 37

... D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 DP0/RSRV/EXT_BR2 IRQ1/DP1/EXT_BG2 IRQ2/DP2/TLBISYNC/EXT_DBG2 MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 21. Pinout List (continued) Pin Name Ball E18 B17 A15 A12 D11 D18 A17 A14 ...

Page 38

... MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 38 Table 21. Pinout List (continued) Pin Name Ball D21 C21 B21 A21 E20 V3 C22 F25 C29 E27 E28 F26 F27 F28 G25 D29 E29 F29 G28 A27 C25 E24 D24 C24 Freescale Semiconductor ...

Page 39

... L_A21/PERR 1 L_A22/SERR 1 L_A23/REQ0 1 1 L_A24/REQ1 /HSEJSW 1 L_A25/GNT0 1 1 L_A26/GNT1 /HSLED 1 1 L_A27/GNT2 /HSENUM MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 21. Pinout List (continued) Pin Name Ball B26 A26 B25 A25 E23 B24 A24 B23 A23 ...

Page 40

... Table 21. Pinout List (continued) Pin Name Ball AB29 AB28 P25 AB27 H29 J29 J28 J27 J26 J25 K25 L29 L27 L26 L25 M29 M28 M27 M26 N29 T25 U27 U26 U25 V29 V28 V27 V26 W27 W26 W25 Y29 Y28 Y25 AA29 Freescale Semiconductor ...

Page 41

... CLKIN1 PA0/RESTART1/DREQ3/FCC2_UTM_TXADDR2 PA1/REJECT1/FCC2_UTM_TXADDR1/DONE3 PA2/CLK20/FCC2_UTM_TXADDR0/DACK3 PA3/CLK19/FCC2_UTM_RXADDR0/DACK4/L1RXD1A2 PA4/REJECT2/FCC2_UTM_RXADDR1/DONE4 PA5/RESTART2/DREQ4/FCC2_UTM_RXADDR2 PA6/L1RSYNCA1 PA7/SMSYN2/L1TSYNCA1/L1GNTA1 PA8/SMRXD2/L1RXD0A1/L1RXDA1 PA9/SMTXD2/L1TXD0A1 PA10/FCC1_UT8_RXD0/FCC1_UT16_RXD8/MSNUM5 PA11/FCC1_UT8_RXD1/FCC1_UT16_RXD9/MSNUM4 MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 21. Pinout List (continued) Pin Name Ball AA28 L28 N28 T28 W28 T1 D1 AH3 AG5 AJ3 ...

Page 42

... Table 21. Pinout List (continued) Pin Name Ball 2 AJ21 2 AH20 2 AG19 2 AF18 2 AF17 2 AE16 2 AJ16 2 AG15 2 AJ13 2 AE13 2 AF12 2 AG11 2 AH9 2 AJ8 2 AH7 2 AF7 2 AD5 2 AF1 2 AD3 2 AB5 2 AD28 2 AD26 2 AD25 2 AE26 2 AH27 2 AG24 2 AH24 2 AJ24 2 AG22 2 AH21 2 AG20 2 AF19 2 AJ18 2 AJ17 Freescale Semiconductor ...

Page 43

... PC5/FCC2_UTM_TXCLAV/FCC2_UTS_TXCLAV/SI2_L1ST3/FCC2_CTS PC6/FCC1_CD/L1CLKOC1/FCC1_UTM_RXADDR2/FCC1_UTS_RXADDR/ FCC1_UTM_RXCLAV1 PC7/FCC1_CTS/L1RQC1/FCC1_UTM_TXADDR2/FCC1_UTS_TXADDR2/ FCC1_UTM_TXCLAV1 PC8/CD4/RENA4/FCC1_UT16_TXD0/SI2_L1ST2/CTS3 PC9/CTS4/CLSN4/FCC1_UT16_TXD1/SI2_L1ST1/L1TSYNCA2/L1GNTA2 PC10/CD3/RENA3/FCC1_UT16_TXD2/SI1_L1ST4/FCC2_UT8_RXD3 PC11/CTS3/CLSN3/L1CLKOD1/L1TXD3A2/FCC2_UT8_RXD2 PC12/CD2/RENA2/SI1_L1ST3/FCC1_UTM_RXADDR1/ FCC1_UTS_RXADDR1 PC13/CTS2/CLSN2/L1RQD1/FCC1_UTM_TXADDR1/ FCC1_UTS_TXADDR1 PC14/CD1/RENA1/FCC1_UTM_RXADDR0/FCC1_UTS_RXADDR0 PC15/CTS1/CLSN1/SMTXD2/FCC1_UTM_TXADDR0/ FCC1_UTS_TXADDR0 MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 21. Pinout List (continued) Pin Name Ball 2 AE14 2 AF13 2 AG12 2 AH11 2 AH16 2 AE15 2 ...

Page 44

... Table 21. Pinout List (continued) Pin Name Ball 2 AF15 2 AJ15 2 AH14 2 AG13 2 AH12 2 AJ11 2 AG10 2 AE10 2 AF9 2 AE8 2 AJ6 2 AG2 2 AF3 2 AF2 2 AE1 2 AD1 2 AC28 2 AD27 2 AF29 2 AF28 2 AG25 2 AH26 2 AJ27 2 AJ23 2 AG23 2 AJ22 2 AE20 2 AJ20 2 AG18 2 AG17 2 AF16 2 AH15 2 AJ14 Freescale Semiconductor ...

Page 45

... The default configuration of the CPM pins (PA[0–31], PB[4–31], PC[0–31], PD[4–31]) is input. To prevent excessive DC current recommended to either pull unused pins to GND or VDDH configure them as outputs. MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Table 21. Pinout List (continued) Pin Name ...

Page 46

... Nominal unmounted package height 1.55 mm MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 46 22. The package type is a 37.5 × 37.5 mm, 480-lead TBGA. Table Table 22. Package Parameters Parameter Value 37.5 × 37.5 mm 480 (29 × 29 ball array) 1.27 mm Freescale Semiconductor ...

Page 47

... Figure 15 provides the mechanical dimensions and bottom surface nomenclature of the 480 TBGA package. Figure 15. Mechanical Dimensions and Bottom Surface Nomenclature MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Package Description Notes: 1. Dimensions and Tolerancing per ASME Y14.5M-1994. ...

Page 48

... Document template update MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2 XXX Figure 16. Freescale Part Number Key Table 23. Document Revision History Substantive Changes Figure 16. Table 12. X Die Revision Level Processor Frequency (CPU/CPM/Bus) Package ZU = 480 TBGA VV = 480 TBGA (Pb Free) Freescale Semiconductor ...

Page 49

... Table 8: Change to sp20/sp21. 0 — Initial version MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0 Freescale Semiconductor Substantive Changes (Table 10) was changed. This change was not previously recorded in this and Section 1, “Features”: Addition of MPC8255 notes Figure 2 Table 3 and θ ...

Page 50

... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...

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