MPC8313VRADDB Freescale Semiconductor, MPC8313VRADDB Datasheet

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... NOTE The information in this document is accurate for revisions 1.0, 2.x, and later. See Numbers Fully Addressed by this Document.” © Freescale Semiconductor, Inc., 2007–2009. All rights reserved. Document Number: MPC8313EEC ™ II Pro Processor 1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 ...

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... Core w/FPU and Power Management 16-KB 16-KB I-Cache D-Cache USB 2.0 Security Engine 2.2 Host/Device/OTG On-Chip ULPI FS PHY Figure 1. MPC8313E Block Diagram ™ II Pro Processor Hardware Specifications, Rev controllers, a Local Bus, DDR1/DDR2 SPI Controller Gb Ethernet Gb Ethernet MAC MAC Freescale Semiconductor ...

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... PCI 3.3-V compatible (not 5-V compatible) • Support for host and agent modes • On-chip arbitration, supporting three external masters on PCI • Selectable hardware-enforced coherency MPC8313E PowerQUICC Freescale Semiconductor ™ II Pro Processor Hardware Specifications, Rev. 3 Overview 2 C, and an SPI interface 3 ...

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... Recognition of VLAN, stacked (queue in queue) VLAN, IEEE Std 802.2®, PPPoE session, MPLS stacks, and ESP/AH IP-security headers • Transmission from up to eight physical queues. • Reception eight physical queues MPC8313E PowerQUICC 4 ™ II Pro Processor Hardware Specifications, Rev. 3 Freescale Semiconductor ...

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... On-chip split power supply controlled through external power switch for minimum standby power • Support for PME generation in PCI agent mode, PME detection in PCI host mode • Supports wake-up from Ethernet (Magic Packet), USB, GPIO, and PCI (PME input as host) MPC8313E PowerQUICC Freescale Semiconductor ™ II Pro Processor Hardware Specifications, Rev. 3 Overview 5 ...

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... MPC8313E. The MPC8313E is currently targeted to these specifications. Some of these specifications are independent of the I/O cell, but are included for a more complete reference. These are not purely I/O buffer design specifications. MPC8313E PowerQUICC DUART, Local Bus Controller, and ™ II Pro Processor Hardware Specifications, Rev. 3 Freescale Semiconductor ...

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... MPC8313E. Note that the values in Table 2 are the recommended and tested operating conditions particular block is given a voltage falling within the range in the Recommended Value column, the MPC8313E is capable of delivering the MPC8313E PowerQUICC Freescale Semiconductor Table 1. Absolute Maximum Ratings Symbol V DD ...

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... J ™ II Pro Processor Hardware Specifications, Rev. 3 Current Unit 1 Requirement V 469 mA V 377 mA V 170 mA V — — — V 2– 2– — V 4– — — V 2– 2– 131 mA V 140 mA V — — °C — Freescale Semiconductor ...

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... I/O voltages are supplied before the core voltage, there might be a period of time that all input and output pins are actively driven and cause contention and excessive current. In order to avoid actively driving the I/O pins and to eliminate excessive current draw, apply the core voltage (V MPC8313E PowerQUICC Freescale Semiconductor + 20 ...

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... V and an artificial smoker test running at room junction temperature ™ II Pro Processor Hardware Specifications, Rev. 3 Figure 3. Once both the power supplies , GV , and DDC 0 >= 32 clocks PCI_SYNC_IN 1 Maximum for Rev. 2.x or Later Unit 3 3 Silicon 1200 mW 1200 mW = 105°C, and an artificial J Freescale Semiconductor ...

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... The interfaces are run at the following frequencies: DDR: 333 MHz, eLBC 83 MHz, PCI 33 MHz, eTSEC1 and TSEC2: 167 MHz, SEC: 167 MHz, USB: 167 MHz. See the SCCR register for more information. 3 This is maximum power in D3 Warm based on a voltage of 1.05 V and a junction temperature of 105°C. MPC8313E PowerQUICC Freescale Semiconductor ...

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... II Pro Processor Hardware Specifications, Rev. 3 Min Max 2 0 –0.3 0.4 IL — ±10 IN — ±10 IN — ±50 IN Table 8 provides the system Min Typ Max Unit 24 — 66.67 MHz 15 — — ns 0.6 0.8 1 — — — ±150 ps Freescale Semiconductor Unit V V μA μA μA Notes 1 — ...

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... CFG_CLKIN_DIV) with respect to negation of PORESET when the device is in PCI agent mode Input hold time for POR configuration signals with respect to negation of HRESET Time for the device to turn off POR configuration signal drivers with respect to the assertion of HRESET MPC8313E PowerQUICC Freescale Semiconductor Symbol Condition V — — ...

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... OUT DD ™ II Pro Processor Hardware Specifications, Rev. 3 Max Unit Notes — PCI_SYNC_IN Max Unit Notes μs 100 — (typ Max Unit Notes 1 0.51 × 0. REF GV + 0.3 V — – 0.125 V — REF μA 9.9 4 — mA — — mA — Freescale Semiconductor ...

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... Output leakage is measured with all outputs disabled Table 15 provides the DDR capacitance when Table 15. DDR SDRAM Capacitance for GV Parameter/Condition Input/output capacitance: DQ, DQS Delta input/output capacitance: DQ, DQS Note: 1. This parameter is sampled MPC8313E PowerQUICC Freescale Semiconductor 1 (typ Symbol DIO = 1.8 V ± 0.090 MHz 25° ...

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... Note μA 500 1 1 (typ Max Unit Notes MV – 0.25 V — REF — V — (typ Max Unit Notes MV – 0.31 V — REF — V — Max Unit Notes — 750 — — 750 — — . This can be DISKEW ) is the CISKEW Freescale Semiconductor ...

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... ADDR/CMD output hold with respect to MCK MCS output setup with respect to MCK MCS output hold with respect to MCK MCK to MDQS Skew MDQ//MDM output setup with respect to MDQS MDQ//MDM output hold with respect to MDQS MDQS preamble start MPC8313E PowerQUICC Freescale Semiconductor t MCK DISKEW t DISKEW Figure 4 ...

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... II Pro Processor Hardware Specifications, Rev. 3 Max Unit Notes 0 for memory clock MCK describes the DDR timing (DD) DDKHMH can be modified through control DDKHMH follows the DDKHMP Max Unit Notes — — — — — — — — 0 — — — — Freescale Semiconductor ...

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... Figure 5 shows the DDR SDRAM output timing for the MCK to MDQS skew measurement (t MCK MCK MDQS MDQS MPC8313E PowerQUICC Freescale Semiconductor 1 Symbol Min –0.5 × – 0.6 DDKHMP MCK t – ...

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... DDKHAS DDKHCS DDKHAX DDKHCX NOOP t DDKHMP t DDKHMH t DDKHDS t DDKLDS DDKHDX = 50 Ω Ω Figure 7. DDR AC Test Load Symbol ™ II Pro Processor Hardware Specifications, Rev DDKHME t DDKLDX Min Max Unit 2 0.3 DD –0.3 0.8 NV – 0.2 — DD — 0.2 — ±5 Freescale Semiconductor μA ...

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... JEDEC EIA/JESD8-5. Parameter Symbol Supply voltage 3 /LV DDA DDB Output high voltage V OH MPC8313E PowerQUICC Freescale Semiconductor Table 23. DUART AC Timing Specifications th sampled 0 after the 1-to-0 transition of the start bit. Subsequent bit values are Table 24. MII DC Electrical Characteristics Conditions — –4 ...

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... DDA 0.3 DDB –0.3 0.90 — 40 –600 — and Table 2. Min Max Unit 2.37 2.63 2. 0.3 DDA 0.3 DDB V – 0.3 0. 0.3 DDA 0.3 DDB –0.3 0.70 — 10 –15 — Table 1 and Table 2. Freescale Semiconductor μA μ μA μA ...

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... MII receive AC timing specifications. Table 27. MII Receive AC Timing Specifications At recommended operating conditions with LV Parameter/Condition RX_CLK clock period 10 Mbps RX_CLK clock period 100 Mbps RX_CLK duty cycle RXD[3:0], RX_DV, RX_ER setup time to RX_CLK MPC8313E PowerQUICC Freescale Semiconductor / LV /NV of 3.3 V ± 0.3 V. DDA DDB DD 1 ...

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... Figure 9. TSEC AC Test Load t MRX t t MRXF MRXH Valid Data t MRDVKH ™ II Pro Processor Hardware Specifications, Rev. 3 Min Typ Max 10.0 — — 1.0 — 4.0 1.0 — 4.0 symbolizes MII receive MRDVKH clock reference (K) MRX DDA DDB t MRXR t MRDXKH Freescale Semiconductor Unit for ...

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... Table 29. RMII Receive AC Timing Specifications At recommended operating conditions with NV Parameter/Condition REF_CLK clock period REF_CLK duty cycle RXD[1:0], CRS_DV, RX_ER setup time to REF_CLK RXD[1:0], CRS_DV, RX_ER hold time to REF_CLK REF_CLK clock rise V (min (max MPC8313E PowerQUICC Freescale Semiconductor of 3.3 V ± 0 Symbol t RMX t t RMXH/ RMX t RMTKHDX ...

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... SKRGT t RGT t /t RGTH RGT ™ II Pro Processor Hardware Specifications, Rev. 3 Min Typ Max 1.0 — 4.0 symbolizes RMII RMRDVKH RMX Ω RMXR t RMRDXKH Min Typ Max –0.5 — 0.5 1.0 — 2.8 7.2 8.0 8 Freescale Semiconductor Unit ns for clock Unit ...

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... RGMII and RTBI AC timing and multiplexing diagrams. GTX_CLK (At Transmitter) TXD[8:5][3:0] TXD[7:4][3:0] TX_CTL TX_CLK (At PHY) RXD[8:5][3:0] RXD[7:4][3:0] RX_CTL RX_CLK (At PHY) Figure 14. RGMII and RTBI AC Timing and Multiplexing Diagrams MPC8313E PowerQUICC Freescale Semiconductor /LV of 2.5 V ± 5%. DDA DDB 1 Symbol RGTH RGT t RGTR t ...

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... MPC8313E PowerQUICC 28 15, where C is the external (on board) AC-coupled capacitor. Each TX Figure 33. as long as such termination does not violate SD_REF_CLK and 16. ™ II Pro Processor Hardware Specifications, Rev. 3 Section 9, SD_REF_CLK Min Typ Max Unit — 8 — — — 100 –50 — 50 Freescale Semiconductor ...

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... SerDes transmitter is terminated with 100-Ω differential load between TX and TX also referred to as output common mode voltage. OS Transmitter MPC8313E SGMII SerDes Interface Receiver Figure 15. 4-Wire AC-Coupled SGMII Serial Link Connection Example MPC8313E PowerQUICC Freescale Semiconductor Symbol Min Typ 0.95 1 — ...

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... TX n Symbol Min XCOREV 0. 100 RX_DIFFp — CM_ACp RX_DIFF Z 20 RX_CM V — 18, respectively. ™ II Pro Processor Hardware Specifications, Rev Typ Max Unit Notes 1.0 1.05 V N/A — 1200 mV — 100 mV — 100 mV Ω 100 120 Ω — — V xcorevss Freescale Semiconductor ...

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... Each UI is 800 ps ± 100 ppm. 3. The external AC coupling capacitor is required recommended to be placed near the device transmitter outputs. 4. Refer to the RapidIO™ 1x/4x LP Serial Physical Layer Specification , for interpretation of jitter specifications. MPC8313E PowerQUICC Freescale Semiconductor Ethernet: Three-Speed Ethernet, MII Management = 1.0 V ± 5%. DD ...

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... V /2 RX_DIFFp-p-min – RX_DIFFp-p-max Figure 17. SGMII Receiver Input Compliance Mask D+ Package D+ Package D– Package Figure 18. SGMII AC Test/Measurement Load MPC8313E PowerQUICC 32 0 0.275 0.4 Time (UI) Pin Pin Silicon + Package Ω Pin ™ II Pro Processor Hardware Specifications, Rev 0.6 0.725 Ω Freescale Semiconductor ...

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... At recommended operating conditions with L/TV Parameter/Condition TSEC_1588_CLK clock period TSEC_1588_CLK duty cycle TSEC_1588_CLK peak-to-peak jitter Rise time eTSEC_1588_CLK (20%–80%) Fall time eTSEC_1588_CLK (80%–20%) TSEC_1588_CLK_OUT clock period TSEC_1588_CLK_OUT duty cycle TSEC_1588_PULSE_OUT MPC8313E PowerQUICC Freescale Semiconductor t T1588CLKOUT t T1588CLKOUTH t T1588OV T1588CLKOUT t T1588CLK t T1588CLKH t T1588TRIGH Table 36. of 3.3 V ± ...

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... Table 37 and Min Max 2.37 2.63 = Min 2. 0.3 DDB DDA 0.3 DDB = Min V – 0.3 0.40 DDB SS = Min 1.7 — DDB = Min –0.3 0.70 DDB — 10 –15 — Table 1 and Table 2. Freescale Semiconductor Notes 2 Table 38 Unit μA μA ...

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... For rise and fall times, the latter MDC convention is used with the appropriate letter: R (rise (fall). 2. This parameter is dependent on the csb_clk speed. (The MIIMCFG[Mgmt Clock Select] field determines the clock frequency of the Mgmt Clock EC_MDC.) MPC8313E PowerQUICC Freescale Semiconductor Conditions — –1 ...

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... OD – V The V TXn TXn. (or differential input swing): ID – The V value can be either positive or negative. RXn RXn ID ™ II Pro Processor Hardware Specifications, Rev MDCR , is defined as the difference of OD value can be either positive defined as the difference of the two ID Freescale Semiconductor ...

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... The differential output signal ranges between 500 and –500 mV, in other words, V differential voltage ( 500 mV. The peak-to-peak differential voltage (V DIFFp MPC8313E PowerQUICC Freescale Semiconductor DIFFp = |A – B| volts. DIFFp DIFFp × ...

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... DC exceeds the maximum input current limitations, then it must be SS AC-coupled off-chip. • The input amplitude requirement. This requirement is described in detail in the following sections. MPC8313E PowerQUICC 38 are specified in DD followed by on-chip AC coupling. SS ™ II Pro Processor Hardware Specifications, Rev. 3 Table 1 and Table Freescale Semiconductor ...

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... SerDes reference clock input requirement for the single-ended signaling mode. — To meet the input amplitude requirement, the reference clock inputs might need coupled externally. For the best noise performance, the reference of the clock could be DC MPC8313E PowerQUICC Freescale Semiconductor 50 Ω Input Amp 50 Ω ...

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... AC coupling. MPC8313E PowerQUICC 40 400 mV < SD_REF_CLK Input Amplitude < 800 mV , the differential reference clocks inputs are HCSL SS ™ II Pro Processor Hardware Specifications, Rev < 800 mV max 100 mV < V < 400 > min V < 400 mV max > V – 400 mV min Freescale Semiconductor ...

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... AC-coupled connection scheme must be used. It assumes the LVDS output driver features a 50-Ω termination resistor. It also assumes that the LVDS transmitter establishes its own common mode level without relying on the receiver or other external component. MPC8313E PowerQUICC Freescale Semiconductor NOTE Figure 30 are for conceptual reference only. Due to the SD n _REF_CLK 100 Ω ...

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... MPC8313E PowerQUICC _REF_CLK 100 Ω Differential PWB Trace SD n _REF_CLK SD n _REF_CLK 100 Ω Differential PWB Trace _REF_CLK ™ II Pro Processor Hardware Specifications, Rev. 3 MPC8313E 50 Ω SerDes Refer. CLK Receiver 50 Ω Figure 29 MPC8313E 50 Ω SerDes Refer. CLK Receiver 50 Ω Freescale Semiconductor ...

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... At recommended operating conditions with XV Parameter Rising edge rate Falling edge rate Differential input high voltage Differential input low voltage MPC8313E PowerQUICC Freescale Semiconductor Total 50 Ω. Assume clock driver’s output impedance is about 16 Ω _REF_CLK 100 Ω Differential PWB Trace SD n _REF_CLK 50 Ω ...

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... MPC8313E PowerQUICC 1.0 V ± 5%. DD_SRDS1 DD_SRDS2 Symbol Rise-fall matching Figure 31. Figure 32 _REF_CLK V + 100 mV CROSS MEDIAN V CROSS MEDIAN V – 100 mV CROSS MEDIAN SD n _REF_CLK ™ II Pro Processor Hardware Specifications, Rev. 3 Min Max Unit Notes — Fall Edge Rate T T FALL RISE Freescale Semiconductor ...

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... USB DC Electrical Characteristics Table 41 provides the DC electrical characteristics for the USB interface. Parameter High-level input voltage Low-level input voltage Input current = –100 μA High-level output voltage 100 μA Low-level output voltage MPC8313E PowerQUICC Freescale Semiconductor Table 41. USB DC Electrical Characteristics Symbol ...

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... For example Ω Ω Figure 34. USB AC Test Load t USIXKH t USIVKH t USKHOX Figure 35. USB Signals ™ II Pro Processor Hardware Specifications, Rev. 3 Max Unit Notes — ns — ns — — ns for symbolizes USB timing USIXKH USKHOX Freescale Semiconductor ...

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... High-level input voltage for Rev 2.x or later Low-level input voltage 1 Input current High-level output voltage, (LV = min Low-level output voltage, (LV = min Note: The parameters stated in above table are valid for all revisions unless explicitly mentioned. MPC8313E PowerQUICC Freescale Semiconductor Symbol V V Conditions — — Symbol –2 mA ...

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... LBIXKH1 clock reference (K) goes high (H), in this case for of the signal in question for 3.3 Ω L Freescale Semiconductor Notes for ...

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... LCLK T1 T3 GPCM Mode Output Signals: LCS[0:3]/LWE UPM Mode Input Signal: LUPWAIT Input Signals: LAD[0:15] UPM Mode Output Signals: LCS[0:3]/LBS[0:1]/LGPL[0:5] Figure 38. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV MPC8313E PowerQUICC Freescale Semiconductor t LBIVKH t LBKHOV t LBKHOZ t LBKHOV t LBOTOT t LBKHOZ ...

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... Output Signals: LAD[0:15] t LALEHOV LALE Figure 40. Local Bus Signals, LALE with Respect to LCLK MPC8313E PowerQUICC 50 t LBKHOZ t LBKHOV t LBIVKH t t LBKHOZ t LBKHOV t LBIVKH t LBIVKH t LBKHOZ t LBOTOT t LALETOT ™ II Pro Processor Hardware Specifications, Rev LBIXKH t LBIXKH LBIVKH t LBIXKH t LBIXKH t LBIXKH Freescale Semiconductor ...

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... JTAG external clock frequency of operation JTAG external clock cycle time JTAG external clock pulse width measured at 1.4 V JTAG external clock rise and fall times TRST assert time Input setup times: Input hold times: Valid times: MPC8313E PowerQUICC Freescale Semiconductor Symbol Condition V — — — ...

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... VM = Midpoint Voltage (NV DD Figure 43. TRST Timing Diagram ™ II Pro Processor Hardware Specifications, Rev (continued) Min Max Unit 2 — — the midpoint of the signal in question. TCLK Figure symbolizes JTAG device JTDVKH clock reference (K) JTG Ω JTGR t JTGF /2) VM /2) Freescale Semiconductor Notes 34). for ...

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... Data Outputs Figure 45 provides the test access port timing diagram. JTAG External Clock TDI, TMS t JTKLOX TDO TDO Output Data Valid Figure 45. Test Access Port Timing Diagram MPC8313E PowerQUICC Freescale Semiconductor VM t JTDVKH t JTKLDV t JTKLDZ VM = Midpoint Voltage (NV DD Figure 44. Boundary-Scan Timing Diagram VM t ...

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... Unit 0.3 × NV –0 0.2 × 250 — μA — ± Min Max f 0 400 I2C t 1.3 — I2CL t 0.6 — I2CH 0.6 — I2SVKH 0.6 — I2SXKL 100 — I2DVKH Freescale Semiconductor Notes Unit kHz μs μs μs μs ns ...

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... The MPC8313E does not follow the I Figure 46 provides the AC test load for the I Output Figure 47 shows the AC timing diagram for the I SDA t I2CF t I2CL SCL t I2SXKL S MPC8313E PowerQUICC Freescale Semiconductor Electrical Specifications (continued) Table 49). Symbol t I2DXKL CBUS compatible masters bus devices 5 t I2PVKH t ...

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... II Pro Processor Hardware Specifications, Rev Min Max 0.5 × 0 0.3 × NV –0.5 DD 0.9 × NV — DD 0.1 × NV — DD — ±5 Table 1 and Table 2. Min Max Unit — 6 — ns — 3.0 — — ns symbolizes PCI timing PCIVKH , reference SYS Freescale Semiconductor Unit μA Notes for ...

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... Input timings are measured at the pin. Figure 48 provides the AC test load for PCI. Output Figure 49 shows the PCI input AC timing conditions. CLK Input Figure 49. PCI Input AC Timing Measurement Conditions MPC8313E PowerQUICC Freescale Semiconductor 1 Symbol Min t — PCKHOV t 2 PCKHOX t — ...

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... PCKHOZ Symbol Condition – — — ≤ V ≤ TIWID ™ II Pro Processor Hardware Specifications, Rev. 3 Min Max Unit 2.4 — V — 0.5 V — 0 –0.3 0.8 V μA — ± Symbol Min Unit TIWID ns to ensure proper operation Freescale Semiconductor ...

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... Table 57. GPIO (When Operating at 2 Electrical Characteristics Parameters Symbol Supply voltage 2.5 V Output high voltage Output low voltage Input high voltage Input low voltage Input high current MPC8313E PowerQUICC Freescale Semiconductor = 50 Ω Figure 51. Timers AC Test Load Symbol Condition –8 ...

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... Min Max –15 — Table 63 for the power supply listed 1 2 Symbol Min t 20 PIWID ns to ensure proper operation. PIWID Ω Min Max 2 0.3 DD –0.3 0.8 — ±5 — 0.5 — 0.4 Freescale Semiconductor Unit μA Unit ns Unit V V μ ...

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... SPI outputs—slave mode (external clock) delay SPI inputs—master mode (internal clock) input setup time SPI inputs—master mode (internal clock) input hold time SPI inputs—slave mode (external clock) input setup time MPC8313E PowerQUICC Freescale Semiconductor Table 61. SPI DC Electrical Characteristics Symbol Condition – ...

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... SPI = 50 Ω Figure 53. SPI AC Test Load Table 62. Note that although the specifications t NEIXKH t NEKHOV ™ II Pro Processor Hardware Specifications, Rev Min Max 2 — symbolizes the NMSI NIKHOV Ω L Freescale Semiconductor Unit ns for ...

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... The package parameters are as provided in the following list. The package type × 27 mm, 516 TEPBGAII. Package outline Interconnects Pitch Module height (typical) Solder Balls Ball diameter (typical) MPC8313E PowerQUICC Freescale Semiconductor t NIIXKH t NIIVKH t NIKHOV Section 19.1, “Package Parameters for the 27 mm × 516 1 ...

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... Datum A, the seating plane, is determined by the spherical crowns of the solder balls. 5. Package code 5368 is to account for PGE and the built-in heat spreader. Figure 56. Mechanical Dimension and Bottom Surface Nomenclature of the MPC8313E TEPBGAII MPC8313E PowerQUICC 64 ™ II Pro Processor Hardware Specifications, Rev. 3 Freescale Semiconductor ...

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... MEMC_MDQ8 MEMC_MDQ9 MEMC_MDQ10 MEMC_MDQ11 MEMC_MDQ12 MEMC_MDQ13 MEMC_MDQ14 MEMC_MDQ15 MEMC_MDQ16 MEMC_MDQ17 MEMC_MDQ18 MEMC_MDQ19 MEMC_MDQ20 MEMC_MDQ21 MEMC_MDQ22 MEMC_MDQ23 MEMC_MDQ24 MEMC_MDQ25 MEMC_MDQ26 MEMC_MDQ27 MEMC_MDQ28 MPC8313E PowerQUICC Freescale Semiconductor Package Pin Number DDR Memory Controller Interface A8 A9 C10 C9 E9 E11 E10 A19 D18 A17 E17 ...

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... B22 B7 E6 E18 E20 A7 E7 B19 A23 D15 A18 A15 E12 D11 B11 A11 A12 E13 C12 E14 B15 C17 C13 A16 C15 C16 E15 B18 C11 B10 ™ II Pro Processor Hardware Specifications, Rev. 3 Power Pin Type Notes Supply Freescale Semiconductor ...

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... LAD8 LAD9 LAD10 LAD11 LAD12 LAD13 LAD14 LAD15 LA16 LA17 LA18 LA19 LA20 LA21 LA22 LA23 MPC8313E PowerQUICC Freescale Semiconductor Package Pin Number D10 A10 B14 A13 A14 B23 C23 Local Bus Controller Interface K25 K24 K23 K22 J25 J24 J23 ...

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... F22 D26 E24 H26 L22 E26 AA23 AA24 AA25 AA26 Y22 E21 H22 G26 AC24 Y24 Y26 W22 W24 W26 V22 V23 V24 V25 V26 U22 AD24 L25 ™ II Pro Processor Hardware Specifications, Rev. 3 Power Pin Type Notes Supply Freescale Semiconductor ...

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... Table 63. MPC8313E TEPBGAII Pinout Listing (continued) Signal LA14/TSEC_1588_TRIG1 LA15/TSEC_1588_ALARM2 UART_SOUT1/MSRCID0 UART_SIN1/MSRCID1 UART_CTS1/GPIO8/MSRCID2 UART_RTS1/GPIO9/MSRCID3 UART_SOUT2/MSRCID4/TSEC_1588_CLK UART_SIN2/MDVAL/TSEC_1588_GCLK UART_CTS2/TSEC_1588_PP1 UART_RTS2/TSEC_1588_PP2 IIC1_SDA/CKSTOP_OUT/TSEC_1588_TRIG1 IIC1_SCL/CKSTOP_IN/TSEC_1588_ALARM2 IIC2_SDA/PMC_PWR_OK/GPIO10 IIC2_SCL/GPIO11 MCP_OUT IRQ0/MCP_IN IRQ1 IRQ2 IRQ3/CKSTOP_OUT IRQ4/CKSTOP_IN/GPIO12 CFG_CLKIN_DIV EXT_PWR_CTRL CFG_LBIU_MUX_EN TCK TDI TDO MPC8313E PowerQUICC Freescale Semiconductor Package Pin Number L24 K26 DUART interface Interrupts Configuration D5 ...

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... Package Pin Number E4 E5 TEST F4 DEBUG F5 System Control Clocks U26 U25 U23 T26 R26 T22 U24 R22 T24 MISC N1 N3 PCI AF7 AB11 AB20 AF23 AF22 AB19 AE22 AF21 ™ II Pro Processor Hardware Specifications, Rev. 3 Power Pin Type Notes Supply Freescale Semiconductor ...

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... PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 PCI_C/BE0 PCI_C/BE1 PCI_C/BE2 PCI_C/BE3 PCI_PAR PCI_FRAME MPC8313E PowerQUICC Freescale Semiconductor Package Pin Number AD19 AD20 AC18 AD18 AB18 AE19 AB17 AE18 AD17 AF19 AB14 AF15 AD14 AE14 AF12 AE11 AD12 ...

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... AD4 AF5 AE6 AC7 ™ II Pro Processor Hardware Specifications, Rev. 3 Power Pin Type Notes Supply DDB IO LV DDB DDB IO LV DDB IO LV DDB IO LV DDB IO LV DDB IO LV DDB I LV DDB I LV DDB I LV DDB O LV DDB O LV DDB Freescale Semiconductor ...

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... TSEC2_RXD3/GPIO20 TSEC2_RXD2/GPIO21 TSEC2_RXD1/GPIO22 TSEC2_RXD0/GPIO23 TSEC2_RX_ER/GTM1_TOUT2/GTM2_TOUT1/GPIO24 TSEC2_TX_CLK/GPIO25 TSEC2_TXD3/CFG_RESET_SOURCE0 TSEC2_TXD2/CFG_RESET_SOURCE1 TSEC2_TXD1/CFG_RESET_SOURCE2 TSEC2_TXD0/CFG_RESET_SOURCE3 TSEC2_TX_EN/GPIO26 TSEC2_TX_ER/GPIO27 TXA TXA RXA RXA TXB TXB MPC8313E PowerQUICC Freescale Semiconductor Package Pin Number AD6 AD5 AB7 AB8 AE1 AF6 AB9 ETSEC2 AB4 AB3 AC1 AC2 AA3 Y5 AA4 AB2 AA5 ...

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... R4 R3 USB PHY P26 N26 P24 L26 M24 M26 N24 N25 M25 M22 N22 P22 GTM/USB AD23 AE23 AC22 AB21 SPI H1 ™ II Pro Processor Hardware Specifications, Rev. 3 Power Pin Type Notes Supply I I 200 Ω GND 100 Ω GND Freescale Semiconductor ...

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... SPIMISO/GTM1_TGATE3/GTM2_TGATE4/GPIO29/ LDVAL SPICLK/GTM1_TOUT3/GPIO30 SPISEL/GPIO31 AV DD1 AV DD2 DDA LV DDB MV REF DDC MPC8313E PowerQUICC Freescale Semiconductor Package Pin Number Power and Ground Supplies F14 P21 A2,A3,A4,A24,A25,B3, B4,B5,B12,B13,B20,B21, B24,B25,B26,D1,D2,D8, D9,D16,D17 D24,D25,G23,H23,R23, T23,W25,Y25,AA22,AC23 W2,Y2 AC8,AC9,AE4,AE5 C14,D14 G4,H4,L2,M2,AC16,AC17, AD25,AD26,AE12,AE13, AE20,AE21,AE24,AE25, AE26,AF24,AF25 K11,K12,K13,K14,K15, K16,L10,L17,M10,M17, N10,N17,U12,U13, F6,F10,F19,K6,K10,K17, K21,P6,P10,P17,R10,R17, ...

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... AA17,AA21,AC4,AC5, AC12,AC13,AC20,AC21, AD1,AE2,AE8,AE9,AE16, AE17,AF2 T1,U2,V2 P2,R2,T3 P5,U4 P3,V4 . ™ II Pro Processor Hardware Specifications, Rev. 3 Power Pin Type Notes Supply — — Core power for — SerDes transceivers (1.0 V) — — Pad power for — SerDes transceivers (1.0 V) — — Freescale Semiconductor ...

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... CFG_CLKIN_DIV SYS_CLK_IN SYS_CR_CLK_IN Crystal SYS_CR_CLK_OUT GTX_CLK125 eTSEC 125-MHz Source Protocol Converter 1 Multiplication factor 1.5, 2, 2.5, and 3. Value is decided by RCWLR[COREPLL]. 2 Multiplication factor and 6. Value is decided by RCWLR[SPMF]. MPC8313E PowerQUICC Freescale Semiconductor e300c3 Core Core PLL DDR Memory csb_clk Controller ddr_clk Clock Unit System ...

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... In addition, some of the internal units may be required to be shut off or operate at lower frequency than the csb_clk frequency. Those units have a default clock ratio that can be configured by a memory mapped register after the device comes out of reset. frequency. MPC8313E PowerQUICC 78 Table 64 specifies which units have a configurable clock ™ II Pro Processor Hardware Specifications, Rev. 3 Freescale Semiconductor ...

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... LCCR[CLKDIV]), which is in turn the csb_clk frequency (depending on RCWL[LBCM]). 20.1 System PLL Configuration The system PLL is controlled by the RCWL[SPMF] parameter. encodings for the system PLL. MPC8313E PowerQUICC Freescale Semiconductor Table 64. Configurable Clock Units Default Frequency csb_clk Off, csb_clk, csb_clk /2, csb_clk /3 csb_clk ...

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... II Pro Processor Hardware Specifications, Rev 33.33 66.67 csb_clk Frequency (MHz) 133 100 100 133 125 167 150 133 100 100 133 125 167 150 Freescale Semiconductor ...

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... Core VCO frequency = core frequency × VCO divider. Note that VCO divider has to be set properly so that the core VCO frequency is in the range of 400–800 MHz. MPC8313E PowerQUICC Freescale Semiconductor shows the encodings for RCWL[COREPLL]. COREPLL values that are NOTE Table 68 ...

Page 82

... Note 6 133.3 200 267 333 Symbol TEPBGA II Unit R 25 °C/W θ °C/W θ °C/W θJMA R 15 °C/W θJMA R 10 °C/W θJB Freescale Semiconductor × 3 — 375 — — 400 — 400 Notes ...

Page 83

... The thermal performance of any component is strongly dependent on the power dissipation of surrounding components. In addition, the ambient temperature varies widely within the application. For many natural convection and especially closed box applications, the board temperature at the perimeter MPC8313E PowerQUICC Freescale Semiconductor Board Type Symbol — ...

Page 84

... θ θ θ where junction-to-ambient thermal resistance (°C/W) θ junction-to-case thermal resistance (°C/W) θ case-to- ambient thermal resistance (°C/W) θ CA MPC8313E PowerQUICC Ψ ) can be used to determine the junction temperature with ™ II Pro Processor Hardware Specifications, Rev. 3 Freescale Semiconductor ...

Page 85

... Simplified thermal models of the packages can be assembled using the junction-to-case and junction-to-board thermal resistances listed in models can be made available on request. MPC8313E PowerQUICC Freescale Semiconductor . For instance, the user can change the size of the heat R θ CA ...

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... Woburn, MA 01801 Internet: www.chomerics.com Dow-Corning Corporation Corporate Center PO BOX 994 Midland, MI 48686-0994 Internet: www.dowcorning.com Shin-Etsu MicroSi, Inc. 10028 S. 51st St. Phoenix, AZ 85044 Internet: www.microsi.com MPC8313E PowerQUICC 86 603-224-9988 408-749-7601 818-842-7277 408-436-8770 800-522-6752 603-635-2800 781-935-4850 800-248-2481 888-642-7674 ™ II Pro Processor Hardware Specifications, Rev. 3 Freescale Semiconductor ...

Page 87

... From this case temperature, the junction temperature is determined from the junction to case thermal resistance θ where junction temperature (° case temperature of the package junction-to-case thermal resistance θ power dissipation D MPC8313E PowerQUICC Freescale Semiconductor ™ II Pro Processor Hardware Specifications, Rev. 3 800-347-4572 Thermal 87 ...

Page 88

... AV 1.0 Ω 2.2 µF 2.2 µF Low ESL Surface Mount Capacitors Figure 58. PLL Power Supply Filter Circuit ™ II Pro Processor Hardware Specifications, Rev. 3 Configuration.” , and preferably DD pins pin being supplied to minimize DD AV and AV DD1 DD2 Freescale Semiconductor , DD1 DD ...

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... Suggested bulk capacitors—100 to 330 µF (AVX TPS tantalum or Sanyo OSCON). However, customers should work directly with their power regulator vendor for best values and types of bulk capacitors. MPC8313E PowerQUICC Freescale Semiconductor 1.0 Ω 1 2.2 µF 2.2 µ ...

Page 90

... MPC8313E PowerQUICC All NC (no-connect) signals must remain C). is trimmed until the voltage at the pad equals P P )/2. N ™ II Pro Processor Hardware Specifications, Rev. 3 and XPADV required. DD DDA DDB , DDA /2 (see Figure 60). The DD and R are designed to be close to each N Freescale Semiconductor ) to and DD , DDB DD ...

Page 91

... I/O circuit takes on its normal function. Careful board layout with stubless connections to these pull-up/pull-down resistors coupled with the large value of the pull-up/pull-down resistor should minimize the disruption of signal quality or speed for output pins thus configured. MPC8313E PowerQUICC Freescale Semiconductor ...

Page 92

... IC). Regardless of the numbering, the signal placement recommended in Figure 61 is common to all known emulators. MPC8313E PowerQUICC 92 allows the COP to independently assert HRESET or TRST, while adds many benefits—breakpoints, watchpoints, register and memory Figure ™ II Pro Processor Hardware Specifications, Rev. 3 61; consequently, many different Freescale Semiconductor ...

Page 93

... Some systems require power to be fed from the application board into the debugger repeater card via the COP header. In this case the resistor value for VDD_SENSE should be around 20 Ω. 2. Key location; pin 14 is not physically present on the COP header. MPC8313E PowerQUICC Freescale Semiconductor PORESET SRESET HRESET ...

Page 94

... HRESET” in Table 10. • Added Section 24.2, “Part Marking,” and Figure 62. MPC8313E PowerQUICC 94 Table 73. Document Revision History Substantive Change(s) from 2 2 Table 7. IH level for Rev 2.x or later in Table 45. IH ™ II Pro Processor Hardware Specifications, Rev. 3 Freescale Semiconductor ...

Page 95

... Added paragraph and Figure 59 to Section 22.2, “PLL Power Supply Filtering.” • Added Section 22.4, “SerDes Block Power Supply Decoupling Recommendations • Removed the two figures on PCI undershoot/overshoot voltages and maximum AC waveforms from Section 2.1.2, “Power Supply Voltage Specification,” MPC8313E PowerQUICC Freescale Semiconductor Substantive Change(s) everywhere DD from and LV ...

Page 96

... In Table 42, clarified that AC specs are for ULPI only. 0 6/2007 Initial release. MPC8313E PowerQUICC 96 Substantive Change(s) to XCOREVDD XCOREVSS XPADVDD XPADVSS. SS and AV DD1 DD2 DQS-MDQ/MECC/MDM” text under the Parameter ™ II Pro Processor Hardware Specifications, Rev. 3 and moved AV and AV to Power DD1 DD2 Freescale Semiconductor ...

Page 97

... Processor core frequencies supported by parts addressed by this specification only. Not all parts described in this specification support all core frequencies. Additionally, parts addressed by Part Number Specifications may support other maximum core frequencies. 3. Contact local Freescale office on availability of parts with °C temperature range. MPC8313E PowerQUICC Freescale Semiconductor Table 74. Part Numbering Nomenclature pp t Temperature ...

Page 98

... ATWLYYWW is the standard assembly, test, year, and work week codes. CCCCC is the country code. MMMMM is the mask number. Figure 62. Part Marking for TEPBGAII Device MPC8313E PowerQUICC 98 62. MPCnnnnetppaaar core/ddr MHz ATWLYYWW CCCCC MMMMM YWWLAZ TePBGA ™ II Pro Processor Hardware Specifications, Rev. 3 Freescale Semiconductor ...

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... THIS PAGE INTENTIONALLY LEFT BLANK MPC8313E PowerQUICC Freescale Semiconductor ™ II Pro Processor Hardware Specifications, Rev. 3 Ordering Information 99 ...

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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...