PRIXP425BC Intel, PRIXP425BC Datasheet
PRIXP425BC
Specifications of PRIXP425BC
Available stocks
Related parts for PRIXP425BC
PRIXP425BC Summary of contents
Page 1
... Control Plane Processor Specification Update October 2004 ® Notice: The Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current characterized errata are documented in this specification update ...
Page 2
... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725 visiting Intel's Web site at http://www.intel.com. ...
Page 3
... Contents Revision History ......................................................................................... 5 Preface....................................................................................................... 6 Summary Table of Changes....................................................................... 8 Identification Information.......................................................................... 13 Change Summary: ® Intel IXP425 Step .................................................................... 15 Non-Core Errata....................................................................................... 17 Core Errata .............................................................................................. 30 Specification Changes ............................................................................. 34 Specification Clarifications ....................................................................... 35 Documentation Changes ......................................................................... 51 ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 3 ...
Page 4
... This page is intentionally left blank. ® 4 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ...
Page 5
... Update (251806-001). Published Errata 1 through 10, Specification Changes 1 through 2, Specification Clarifications 1, and Documentation Changes 1 through 20. 001 This first-version document contains errata previously published in the Intel IXP425 Network Processor Based on Intel Specification Update (251805) and replaces that other document. Revision History Description 1 through 8, Specification 1 through 6 ...
Page 6
... IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual Nomenclature Errata are design defects or errors. These may cause the Intel Processors and IXC1100 Control Plane Processor behavior to deviate from published specifications. Hardware and software designed to be used with any given stepping must assume that all errata documented for that stepping are present on all devices ...
Page 7
... Specification changes, specification clarifications are removed from the specification update when the appropriate changes are made to the appropriate product specification or user documentation (datasheets, manuals, etc.). ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Preface 7 ...
Page 8
... The following table indicates the errata, specification changes, or specification clarifications that ® apply to the Intel Processor. Intel may fix some of the errata in a future stepping of the component and account for the other outstanding issues through documentation or specification changes as noted. This table uses the following notations: ...
Page 9
... No Fix (SCR 1653) Character Time-Out Interrupt Sticks Under Certain Fix Software Timing Conditions (SCR 2235) The Intel® IXP425 A-0 Step Processor May Have 21 Fixed Problems Working With Some SDRAM Devices (SCR 2411 Fix PCI DMA Lock-Up Condition (SCR 2372) PCI Doorbell Register Lock-up Condition When Using Two Products Together That Have Intel® ...
Page 10
... No ® 10 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Steppings IXP420, IXP421, Page Status IXP422 B0 Ethernet Coprocessors - Length Errors on Received Fix Frames (SCR 711 Fix PCI DC Parameter VIH Marginality Issue (SCR 3121) False PCI DMA Completion Notification Causing Data ...
Page 11
... ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Steppings IXP420, IXP421, Page Status IXP422 B0 Accesses to the CP15 ID Register with Opcode2 > Fix 0b001 Returns Unpredictable Values Disabling and Re-Enabling the MMU can Hang the Core Fix or Cause it to Execute the Wrong Code ...
Page 12
... ® 12 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Steppings IXP420, IXP421, Page Status IXP422 Doc Correction to Expansion Bus Label (SCR 3888) Correction to Input Reference Slew Rate in a Oscillator X 51 Doc Configuration (SCR 3890) Update of Management Data Output Register (SCR ...
Page 13
... NOTE: For the “Level 1 Name” value of the different devices, see ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor i FWIXP42 XBX <FPO> INTEL M C 2002 <ATPO> YWW KOREA Table 1. Identification Information * Level 1 Name BSMC ...
Page 14
... IXP421 ® Intel IXP420 ® Intel IXP420 ® Intel IXP420 ® Intel IXP420 ® Intel IXC1100 ® Intel IXC1100 ® Intel IXC1100 ® Intel IXC1100 ® Intel IXC1100 ® Intel IXC1100 ® 14 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ...
Page 15
... Errata” on page 9. The internal device ID — specific to the IXP425 network processor — has been updated to reflect the B0-step device. For specific information about the device ID, see the IIntel Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual, Section 3.5.1.1. ...
Page 16
... USB PCI Expansion Bus SDRAM AES / DES / DES3 Multi-Channel HDLC SHA-1 / MD-5 Commercial Temperature Extended Temperature 1. Only the 266-MHz version of the Intel ® 16 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ® Intel IXP425 ® Intel IXP422 Intel ...
Page 17
... IXP425 network processor’s PCI interface may become unpredictable, including continuous retry responses on both the PCI bus and the AHB bus internal to the IXP425 network processor. This errata does apply to the Intel IXC1100 Control Plane Processor A0 stepping. ...
Page 18
... Problem: of the assertion of the PWRON_RST_N line, after which it tri-states the lines, and lets pull-ups and pull-downs in the system take effect. This errata does not apply to the Intel Plane Processor A0 stepping. This appears to the USB-host controller as a “device disconnect” or USB reset. This error could ...
Page 19
... PCI windows — used for high-bandwidth, PCI-initiated IXP425 network processor transactions — are not affected by this problem. Target transactions directed to the IXP425 network processor are not affected. This errata does apply to the Intel Plane Processor A0 stepping. Invalid data is returned from the NP_RD_DATA register for current access. Subsequent accesses Implication: are not affected ...
Page 20
... IER[4] (step 2.) — will prevent the RTO interrupt SM from being entered a second time safe to re-enable the interrupt after the FIFO is empty, as the FIFO empty condition also prevents the RTO interrupt SM from being entered. To execute: ® 20 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 2. — bit in LSR is SET. ...
Page 21
... IXP425 A-0 Step Processor May Have Problems Working With Some SDRAM Devices (SCR 2411) ® Although the Intel Problem: JEDEC SDRAM specification, some SDRAM manufacturers are shifting their devices’ implemen- tation of an optional section of the specification, to maintain consistency between SDRAM Single-Data-Rate (SDR) Memory and SDRAM Double-Data-Rate (DDR) Memory ...
Page 22
... Examples of device A are the Intel PCI-to-PCI 21154 Bridge, another IXP42X device. Other PCI devices may apply. Lockup occurs due to time-out on PCI bus due to the deadlock occurring between the Intel PCI-to-PCI 21154 Bridge and the IXP42X. In this case, the IXP42X product line does a DMA 8-word PCI read, which gets retried by the bridge as the bridge fetches that 8 words of data ...
Page 23
... Fix. Status: 14. PCI Doorbell Register Lock-up Condition When Using Two Products Together That Have Intel IXC1100 Control Plane Processor (SCR 2379 possible that the PCI bus can get in a locked condition when multiple products — using Problem: IXP42X product line and IXC1100 control plane processors — are connected in a system and these systems are using the PCI doorbell registers of the IXP42X product line and IXC1100 control plane processors ...
Page 24
... Problem: are both programmed (normal timing), the expansion bus controller will not extend the T3 data state as described in Figure 60 “Expansion Bus I/O Wait Operation” on page 303, of the Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual. This occurs because there is a synchronizer on the EX_IOWAIT_N signal which causes the expansion bus controller to transition to the T4 state before EX_IOWAIT_N is detected ...
Page 25
... The expansion bus will not extend the T3 data state as shown in Figure 60 of the Intel Implication: Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual (252480-002). To avoid unexpected timing issues need to be programmed to non-zero values and Workaround: assurances made that EX_IOWAIT_N is asserted at least three cycles before the deasserting edge of EX_RD_N ...
Page 26
... The PADC1, PADC0, APDC1, and APDC0 complete bits in the PCI_DMACTRL register will not Problem: be cleared under certain conditions when the Intel XScale core processor performs a write 1 to clear to the appropriate bit. If another PCI DMA transfer is initiated after the clear to the PCI_DMACTRL register, an indication of complete will occur before the DMA transfer has been finished (because the complete bit may have not been cleared) ...
Page 27
... Problem: the data during a read. The HPI specification states that it stops driving data a max after the deassertion of DS (which is ex_wr_n). The Intel and IXC1100 Control Plane Processor turns on the output enable in the T4 state, which is the same cycle where ex_wr_n gets deasserted, so there is no turnaround cycle. ...
Page 28
... Ethernet Coprocessors - Address Filtering Logic Ignores the Second to Last Nibble of the Destination Address (SCR 4185) The IXP42X product line has an Ethernet coprocessor configured by Intel XScale core software. Problem: [Note that some IXP42X product line have two Ethernet coprocessors.] The Ethernet coprocessor logic ignores the second last nibble of the destination address regardless of the packet type (unicast, multicast, broadcast), that is, Destination Address ...
Page 29
... BAR 4 on top of the final BAR so that no ‘last word’ address in each memory address BAR0-3 is adjacent to undefined memory space. For example: BAR4 - config BAR: highest address BAR3 BAR2 BAR1 BAR0 - lowest address No Fix. Status: ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Non-Core Errata 29 ...
Page 30
... Any architectural event (for example, IRQ, data abort). • MSR instructions that alter the CPSR control bits. ® 30 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ...
Page 31
... ID register. Software can therefore determine whether they exist by reading both the main ID register and the desired register and comparing their values. When the two values are not equal, the desired register exists. ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Core Errata 31 ...
Page 32
... The IEEE 1149.1 spec states that the effects of updating all parallel JTAG registers should be seen Problem: on the falling edge of TCK in the Update-DR state. The Intel XScale core parallel JTAG registers require an extra TCK rising edge to make the update visible. Therefore, operations like hold-reset, JTAG break, and vector traps require either an extra TCK cycle by going to Run-Test-Idle or by cycling through the state machine again in order to trigger the expected hardware behavior ...
Page 33
... When a ‘NOP’ is placed at the beginning of the FIQ handler, the ‘NOP’ executes twice and no Workaround: incorrect behavior results. When a branch instruction is placed at the beginning of the handler, it does not execute twice. No Fix. Status: ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor the FIQ handler to be placed ...
Page 34
... Specification Changes 1. Update to Expansion Bus Setup / Hold Timing Values In Table 58, “Setup/Hold Timing Values”, of the Intel Issue: Processors and IXC1100 Control Plane Processor Datasheet, the Output Valid timing specification shows a minimum time of 15 ns. The minimum time for Output Valid timing specification should be blank. Instead, the maximum specification column time for Output Valid should be 15 ns. ® ...
Page 35
... Issue: external PHYs used in the system. For specific implementation specifics, see the IEEE 802.3 speci- fication. Incorrect number of PHYs will be identified. For example, when interfacing a single Intel Implication: LXT972 Fast Ethernet Transceiver to one of the IXP42X product line and IXC1100 control plane processors — ...
Page 36
... MHz 533 MHz NOTES: 1. Typical current ICC and ICCP are not tested. Typical currents were measured on the Intel IXDP425 / IXCDP1100 Development Platform at room temperature using typical SKU silicon samples. A SmartBits* tester was used in a router application running Linux on the development board ...
Page 37
... MHz NOTES: 1. Typical current ICC and ICCP are not tested. Typical currents were measured on the Intel IXCDP1100 Development Platform at room temperature using typical SKU silicon samples. A SmartBits* tester was used in a router application running Linux on the development board. Two Ethernet NPEs, and two Ethernet controller PCI cards were used in this router application ...
Page 38
... Specification Clarifications Replace the affected datasheet figures as follows. Replace datasheet Figure 25, “Intel Multiplexed Mode”, with the following two figures, “Intel Multiplexed Read Mode”, and “Intel ® Intel Multiplexed Read Mode ® Intel Multiplexed Read Mode ALE Extended EX_CLK T EX_CS_N[0] ...
Page 39
... IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 1-4 Cycles 1-16 Cycles T ale2valcs Valid Address T wrpulse T dval2valwrt T ale2addrhold Valid Data ® Simplex Mode”, with the following two figures, “Intel ® Simplex Write Mode”. Specification Clarifications T4 T5 1-4 Cycles 1-16 Cycles T recov T dhold2afterwr B3748-001 ® 39 ...
Page 40
... Simplex Read Mode IXP42X Intel Simplex Read Mode EX_CLK EX_CS_N[0] EX_ADDR[23:0] EX_IOWAIT_N EX_RD_N EX_DATA[15:0] ® Intel Simplex Write Mode IXP42X Intel Simplex Write Mode EX_CLK EX_CS_N[0] EX_ADDR[23:0] EX_IOWAIT_N EX_WR_N EX_DATA[15:0] ® 40 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ...
Page 41
... Cycles ALE Extended EX_CLK T EX_CS_N[0] alepulse EX_ADDR[23:0] EX_ALE EX_IOWAIT_N EX_RD_N (exp_mot_rnw) EX_WR_N (exp_mot_ds_n) EX_DATA[15:0] Valid Address ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 1-4 Cycles 1-16 Cycles T ale2valcs Valid Address T rdsetup Valid Data Specification Clarifications T4 T5 ...
Page 42
... EX_DATA[15:0] Replace datasheet Figure 28, “Motorola* Simplex Mode”, with the following two figures, “Motorola* Simplex Read Mode”, and “Motorola* Simplex Write Mode”. ® 42 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 2-5 Cycles 1-4 Cycles ...
Page 43
... Motorola* Simplex Read Mode Motorola* Simplex Read Mode EX_CLK EX_CS_N[0] EX_ADDR[23:0] EX_ALE EX_IOWAIT_N EX_RD_N (exp_mot_rnw) EX_WR_N (exp_mot_ds_n) EX_DATA[15:0] ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 1-4 Cycles 1-4 Cycles 1-16 Cycles 1-4 Cycles T ad2valcs Valid Address T rdsetup ...
Page 44
... Write Mode”, which follows. ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Affected Docs: Datasheet (252479-003) ® 44 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 1-4 Cycles 1-4 Cycles 1-16 Cycles 1-4 Cycles ...
Page 45
... HPI-8 Mode Write Accesses ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Specification Clarifications 45 ...
Page 46
... Specification Clarifications HPI-8 Mode Read Accesses ® 46 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ...
Page 47
... HPI-16 Multiplex Write Mode ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Specification Clarifications 47 ...
Page 48
... Specification Clarifications HPI-16 Multiplex Read Mode ® 48 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ...
Page 49
... HPI-16 Simplex Read Mode ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Specification Clarifications 49 ...
Page 50
... Specification Clarifications HPI-16 Simplex Write Mode ® 50 Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor ...
Page 51
... IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Issue: Developer’s Manual (page 324), Table 124, “Setting the Intel XScale Core Operation Speed”, is incomplete. Not all the possible expansion bus (core clock speed) configurations are listed. Replace Table 124 with the following table: ® ...
Page 52
... Documentation Changes Table 124. Intel XScale ® Intel XScale Core Speed (Factory Part Speed) 533 MHz 533 MHz 533 MHz 533 MHz 400 MHz 400 MHz 400 MHz 400 MHz 266 MHz 266 MHz 266 MHz 266 MHz ® Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Affected Docs: Developer’ ...