MPC184VFB Freescale Semiconductor, MPC184VFB Datasheet
MPC184VFB
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... Freescale Semiconductor, Inc. Advance Information MPC184TS/D Rev. 1.1, 2/2003 MPC184 Security Processor Technical Summary This technical summary provides an overview of the MPC184 security processor, including a brief development history, target applications, key features, typical system architecture, device architectural overview, and a performance summary. 1 Development History The MPC184 belongs to the Smart Networks platform’ ...
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... Freescale Semiconductor, Inc. Elliptic Curve Cryptography which is especially important for secure wireless communications. MPC184 features include the following: • Public key execution units (PKEU) that supports the following: — RSA and Diffie-Hellman – Programmable field size up to 2048-bits — Elliptic curve cryptography – ...
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... Freescale Semiconductor, Inc. Figure 4-1) or any system using PCI. The ability of the MPC184 master on the 8xx bus allows the co-processor to offload the data movement bottleneck normally associated with slave devices. The external processor accesses the MPC184 through its device drivers using system memory for data storage. The MPC184 resides in the memory map of the processor, therefore when an application requires cryptographic functions, it simply creates descriptors for the MPC184 which defi ...
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... Freescale Semiconductor, Inc. 5 Architectural Overview A block diagram of the MPC184 internal architecture is shown in Figure 5-3. The mode selectable 8xx/PCI bus interface module is designed to transfer 32-bit words between the external bus and any register inside the MPC184. An operation begins with a write of a pointer to a crypto-channel fetch register which points to a data packet descriptor ...
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... Freescale Semiconductor, Inc. Table 6-1. Example Data Packet Descriptor Field Name Value/Type LEN_CTXOUT length PTR_CTXOUT pointer nul length length nul pointer pointer nul length length nul pointer pointer PTR_NEXT pointer Each data packet descriptor contains the following: • Header—The header describes the required services and encodes information that indicates which EUs to use and which modes to set. • ...
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... Freescale Semiconductor, Inc. 6.2 The MPC184 Controller The MPC184 controller manages on-chip resources, including individual execution units (EUs), FIFOs, the EBI, and the internal buses that connect all the various modules. The controller receives service requests from the EBI and various crypto-channels, and schedules the required activities. The controller can confi ...
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... Freescale Semiconductor, Inc. Crypto-channels analyze the data packet descriptor header and request from the controller the first required cryptographic service. The controller implements a programmable prioritization scheme that allows the user to dictate the order in which the four crypto-channels are serviced. After the controller grants access to the required EU, the crypto-channel and the controller perform the following steps: 1 ...
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... Freescale Semiconductor, Inc. by field or modulus size. For example, a field size of 160 is roughly equivalent to the security provided by 1024 bit RSA. A field size set to 208 roughly equates to 2048 bits of RSA security. The PKEU contains routines implementing the atomic functions for elliptic curve processing—point arithmetic and fi ...
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... Freescale Semiconductor, Inc. 7.4 Advanced Encryption Standard Execution Unit (AESU) The AESU is used to accelerate bulk data encryption/decryption in compliance with the Advanced Encryption Standard algorith Rinjdael. The AESU executes on 128 bit blocks with a choice of key sizes: 128, 192, or 256 bits. AESA is a symmetric key algorithm, the sender and receiver use the same key for both encryption and decryption ...
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... Freescale Semiconductor, Inc. Table 8-1. Estimated Bulk Data Encryption Performance (Mbps) 3DES DES CBC CBC 64 byte 43 36 128 byte 75 55 256 byte 119 76 512 byte 173 95 1024 byte 223 109 1536 byte 247 114 The MPC184 supports single pass processing of encryption/message authentication. All performance measurements assume descriptor generation and bus availability (66Mhz, 32bit 8xx bus with typical SDRAM read/write latency) are not constraints ...
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... Freescale Semiconductor, Inc. THIS PAGE INTENTIONALLY LEFT BLANK MOTOROLA MPC184 Security Processor Technical Summary For More Information On This Product, Go to: www.freescale.com 11 ...
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... HOME PAGE: www.motorola.com/semiconductors Freescale Semiconductor, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. ...