MC68HC000RC12 Freescale Semiconductor, MC68HC000RC12 Datasheet - Page 123

• Manufacturer Part Number: MC68HC000RC12
• Description: IC MPU 32BIT 12MHZ 68-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC000RC12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 16/32Bit
• Frequency (max): 12MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 68
• Package Type: PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

8.7 BIT MANIPULATION INSTRUCTION EXECUTION TIMES
Table 8-8 lists the timing data for the bit manipulation instructions. The total number of
clock periods, the number of read cycles, and the number of write cycles are shown in the
previously described format. The number of clock periods, the number of read cycles, and
the number of write cycles, respectively, must be added to those of the effective address
calculation where indicated by a plus sign (+).
8.8 CONDITIONAL INSTRUCTION EXECUTION TIMES
Table 8-9 lists the timing data for the conditional instructions. The total number of clock
periods, the number of read cycles, and the number of write cycles are shown in the
previously described format.
MOTOROLA
+Add effective address calculation time.
* Indicates maximum value; data addressing mode only.
Instruction
BCHG
BCLR
BSET
BTST
Bcc
BRA
BSR
DBcc
Instruction
Table 8-8. Bit Manipulation Instruction Execution Times
Table 8-9. Conditional Instruction Execution Times
MC68000 8-/16-/32-MICROPROCESSORS USER’S MANUAL
Freescale Semiconductor, Inc.
Long
Long
Long
Long
Byte
Byte
Byte
Byte
Size
For More Information On This Product,
cc false, Count Not Expired
cc false, Counter Expired
Displacement
Go to: www.freescale.com
cc true
Word
Word
Word
Byte
Byte
Byte
Register
10(1/0)*
8(1/0)*
8(1/0)*
6(1/0)
—
—
—
—
Dynamic
Memory
8(1/1)+
8(1/1)+
8(1/1)+
4(1/0)+
—
—
—
—
Branch
10(2/0)
10(2/0)
10(2/0)
10(2/0)
18(2/2)
18(2/2)
10(2/0)
Taken
—
—
Register
12(2/0)*
14(2/0)*
12(2/0)*
10(2/0)
—
—
—
—
Branch Not
12(2/0)
12(2/0)
14(3/0)
Taken
8(1/0)
Static
—
—
—
—
—
Memory
12(2/1)+
12(2/1)+
12(2/1)+
8(2/0)+
—
—
—
—
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