MC68HC000CRC8 Freescale Semiconductor, MC68HC000CRC8 Datasheet - Page 135

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MC68HC000CRC8

Manufacturer Part Number
MC68HC000CRC8
Description
IC MPU 32BIT 8MHZ 68-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC000CRC8

Processor Type
M680x0 32-Bit
Speed
8MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
9.6 SHIFT/ROTATE INSTRUCTION EXECUTION TIMES
Tables 9-12 and 9-13 list the timing data for the shift and rotate instructions. The total
number of clock periods, the number of read cycles, and the number of write cycles are
shown in the previously described format. The number of clock periods, the number of
read cycles, and the number of write cycles, respectively, must be added to those of the
effective address calculation where indicated by a plus sign (+).
9-8
CLR
NBCD
NEG
NEGX
NOT
TST
Instruction
Table 9-11. Single Operand Instruction Loop Mode Execution Times
Byte,
Word
Byte,
Word
Byte,
Word
Byte,
Word
Byte,
Word
Long
Long
Long
Long
Long
+Add effective address calculation time.
n is the shift or rotate count.
* Word only.
Byte
Size
ASR, ASL
LSR, LSL
ROR, ROL
ROXR, ROXL
Table 9-12. Shift/Rotate Instruction Execution Times
Instruction
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
10(0/1)
14(0/2)
18(1/1)
16(1/1)
24(2/2)
16(1/1)
24(2/2)
16(1/1)
24(2/2)
12(1/0)
18(2/0)
(An)
Valid Count, cc False
Loop Continued
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10(0/1)
14(0/2)
18(1/1)
16(1/1)
24(2/2)
16(1/1)
24(2/2)
16(1/1)
24(2/2)
12(1/0)
18(2/0)
(An)+
Byte, Word
Byte, Word
Byte, Word
Byte, Word
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Long
Long
Long
Long
12(0/1)
16(0/2)
20(1/1)
18(2/2)
26(2/2)
18(2/2)
26(2/2)
18(2/2)
26(2/2)
14(1/0)
20(2/0)
Size
–(An)
18(2/1)
22(2/2)
24(3/1)
22(3/1)
30(4/2)
22(3/1)
30(4/2)
22(3/1)
30(4/2)
18(3/0)
24(4/0)
(An)
Valid Count, cc True
6+2n (1/0)
8+2n (1/0)
6+2n (1/0)
8+2n (1/0)
6+2n (1/0)
8+2n (1/0)
6+2n (1/0)
8+2n (1/0)
Register
18(2/1)
22(2/2)
24(3/1)
22(3/1)
30(4/2)
22(3/1)
30(4/2)
22(3/1)
30(4/2)
18(3/0)
24(4/0)
(An)+
20(2/0)
24(2/2)
26(3/1)
24(3/1)
32(4/2)
24(3/1)
32(4/2)
24(3/1)
32(4/2)
20(3/0)
26(4/0)
Loop Terminated
–(An)
Memory*
8(1/1)+
8(1/1)+
8(1/1)+
8(1/1)+
16(2/1)
20(2/2)
22(3/1)
20(3/1)
28(4/2)
20(3/1)
28(4/2)
20(3/1)
28(4/2)
16(3/0)
20(4/0)
(An)
Expired Count
16(2/1)
20(2/2)
22(3/1)
20(3/1)
28(4/2)
20(3/1)
28(4/2)
20(3/1)
28(4/2)
16(3/0)
20(4/0)
(An)+
MOTOROLA
18(2/1)
22(2/2)
24(3/1)
22(3/1)
30(4/2)
22(3/1)
30(4/2)
22(3/1)
30(4/2)
18(3/0)
22(4/0)
–(An)

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