MC68HC000CRC8 Freescale Semiconductor, MC68HC000CRC8 Datasheet - Page 84

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MC68HC000CRC8

Manufacturer Part Number
MC68HC000CRC8
Description
IC MPU 32BIT 8MHZ 68-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC000CRC8

Processor Type
M680x0 32-Bit
Speed
8MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
A key consideration when designing in a synchronous environment is the timing for the
assertion of DTACK and BERR by an external device. To properly use external inputs, the
processor must synchronize these signals to the internal clock. The processor must
sample the external signal, which has no defined phase relationship to the CPU clock,
which may be changing at sampling time, and must determine whether to consider the
signal high or low during the succeeding clock period. Successful synchronization requires
that the internal machine receives a valid logic level (not a metastable signal), whether the
input is high, low, or in transition. Metastable signals propagating through synchronous
machines can produce unpredictable operation.
Figure 5-37 is a conceptual representation of the input synchronizers used by the M68000
Family processors. The input latches allow the input to propagate through to the output
when E is high. When low, E latches the input. The three latches require one cycle of CLK
to synchronize an external signal. The high-gain characteristics of the devices comprising
the latches quickly resolve a marginal signal into a valid state.
5-38
UDS/LDS
CLOCK
DTACK
DATA
ADDR
R/W
AS
EXT
SIGNAL
CLK
CLK
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
6
S0
18
Figure 5-36. Synchronous Write Cycle
Freescale Semiconductor, Inc.
For More Information On This Product,
S1
Figure 5-37. Input Synchronizers
D
G
S2
Go to: www.freescale.com
Q
9
.
S3
23
D
G
47
S4
Q
S5
D
G
S6
Q
53
S7
INT
SIGNAL
S0
MOTOROLA

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