MC68HC000RC16 Freescale Semiconductor, MC68HC000RC16 Datasheet - Page 136

• Manufacturer Part Number: MC68HC000RC16
• Description: IC MPU 32BIT 16MHZ 68-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC000RC16

• Processor Type: M680x0 32-Bit
• Speed: 16MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

9.7 BIT MANIPULATION INSTRUCTION EXECUTION TIMES
Table 9-14 lists the timing data for the bit manipulation instructions. The total number of
clock periods, the number of read cycles, and the number of write cycles are shown in the
previously described format. The number of clock periods, the number of read cycles, and
the number of write cycles, respectively, must be added to those of the effective address
calculation where indicated by a plus sign (+).
9.8 CONDITIONAL INSTRUCTION EXECUTION TIMES
Table 9-15 lists the timing data for the conditional instructions. The total number of clock
periods, the number of read cycles, and the number of write cycles are shown in the
previously described format.
MOTOROLA
ASR, ASL
LSR, LSL
ROR, ROL
ROXR, ROXL
Instruction
+Add effective address calculation time.
* Indicates maximum value; data addressing mode only.
BCHG
BCLR
BSET
BTST
Instruction
Table 9-13. Shift/Rotate Instruction Loop Mode Execution Times
Word
Word
Word
Word
Size
Table 9-14. Bit Manipulation Instruction Execution Times
M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL
18(1/1)
18(1/1)
18(1/1)
18(1/1)
(An)
Valid Count cc False
Freescale Semiconductor, Inc.
Long
Long
Long
Long
Byte
Byte
Byte
Byte
Size
Loop Continued
For More Information On This Product,
18(1/1)
18(1/1)
18(1/1)
18(1/1)
(An)+
Go to: www.freescale.com
Register
20(1/1)
20(1/1)
20(1/1)
20(1/1)
10(1/0)*
8(1/0)*
8(1/0)*
6(1/0)*
–(An)
—
—
—
—
Dynamic
24(3/1)
24(3/1)
24(3/1)
24(3/1)
(An)
Valid Count cc True
Memory
10(1/1)+
8(1/1)+
8(1/1)+
4(1/0)+
—
—
—
—
24(3/1)
24(3/1)
24(3/1)
24(3/1)
(An)+
26(3/1)
26(3/1)
26(3/1)
26(3/1)
Loop Terminated
–(An)
Register
12(2/0)*
14(2/0)*
12(2/0)*
10(2/0)
—
—
—
—
22(3/1)
22(3/1)
22(3/1)
22(3/1)
Static
(An)
Expired Count
Memory
12(2/1)+
14(2/1)+
12(2/1)+
8(2/0)+
22(3/1)
22(3/1)
22(3/1)
22(3/1)
—
—
—
—
(An)+
24(3/1)
24(3/1)
24(3/1)
24(3/1)
–(An)
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