MC68HC000RC16 Freescale Semiconductor, MC68HC000RC16 Datasheet - Page 73

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MC68HC000RC16

Manufacturer Part Number
MC68HC000RC16
Description
IC MPU 32BIT 16MHZ 68-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC000RC16

Processor Type
M680x0 32-Bit
Speed
16MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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The processor terminates the bus cycle, then puts the address and data lines in the high-
impedance state. The processor remains in this state until HALT is negated. Then the
processor retries the preceding cycle using the same function codes, address, and data
(for a write operation). BERR should be negated at least one clock cycle before HALT is
negated.
5.4.3 Halt Operation (
HALT performs a halt/run/single-step operation similar to the halt operation of an
MC68000. When HALT is asserted by an external device, the processor halts and remains
halted as long as the signal remains asserted, as shown in Figure 5-29.
MOTOROLA
FC2–FC0
D0–D15
DTACK
A23–A1
BERR
HALT
UDS
R/W
CLK
LDS
AS
To guarantee that the entire read-modify-write cycle runs
correctly and that the write portion of the operation is
performed without negating the address strobe, the processor
does not retry a read-modify-write cycle. When a bus error
occurs during a read-modify-write operation, a bus error
operation is performed whether or not HALT is asserted.
S0
Figure 5-28. Delayed Retry Bus Cycle Timing Diagram
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
S2
Freescale Semiconductor, Inc.
READ
S4
For More Information On This Product,
HALT)
S6
Go to: www.freescale.com
NOTE
HALT
S0
S2
RETRY
S4
S6
5- 27

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