KMC7457VG1267LC Freescale Semiconductor, KMC7457VG1267LC Datasheet

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KMC7457VG1267LC

Manufacturer Part Number
KMC7457VG1267LC
Description
IC MPU RISC 32BIT 1267MHZ 483BGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of KMC7457VG1267LC

Processor Type
MPC74xx PowerPC 32-Bit
Speed
1.267GHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
483-FCCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
KMC7457VG1267LC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
Technical Data
MPC7457
RISC Microprocessor
Hardware Specifications
This hardware specification is primarily concerned with the
MPC7457; however, unless otherwise noted, all information
here also applies to the MPC7447. The MPC7457 and
MPC7447 are implementations of the PowerPC™
microprocessor family of reduced instruction set computer
(RISC) microprocessors. This hardware specification
describes pertinent electrical and physical characteristics of
the MPC7457. For functional characteristics of the
processor, refer to the MPC7450 RISC Microprocessor
Family User’s Manual.
To locate any published updates for this hardware
specification, refer to the website listed on the back page of
this document.
1
The MPC7457 is the fourth implementation of the fourth
generation (G4) microprocessors from Freescale. The
MPC7457 implements the full PowerPC 32-bit architecture
and is targeted at networking and computing systems
applications. The MPC7457 consists of a processor core, a
512-Kbyte L2, and an internal L3 tag and controller that
support a glueless backside L3 cache through a dedicated
© Freescale Semiconductor, Inc., 2004, 2005, 2006. All rights reserved.
Overview
10. Document Revision History . . . . . . . . . . . . . . . . . . . 65
11. Part Numbering and Marking . . . . . . . . . . . . . . . . . . 67
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3. Comparison with the MPC7455, MPC7445,
4. General Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5. Electrical and Thermal Characteristics . . . . . . . . . . . 10
6. Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7. Pinout Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8. Package Description . . . . . . . . . . . . . . . . . . . . . . . . . 43
9. System Design Information . . . . . . . . . . . . . . . . . . . 49
MPC7450, MPC7451, and MPC7441 . . . . . . . . . . . . 8
Contents
Rev. 7, 03/2006
MPC7457EC

Related parts for KMC7457VG1267LC

KMC7457VG1267LC Summary of contents

Page 1

... The MPC7457 consists of a processor core, a 512-Kbyte L2, and an internal L3 tag and controller that support a glueless backside L3 cache through a dedicated © Freescale Semiconductor, Inc., 2004, 2005, 2006. All rights reserved. MPC7457EC Rev. 7, 03/2006 Contents 1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 ...

Page 2

... Branch instructions that do not update the count register (CTR) or link register (LR) are often removed from the instruction stream. – Eight-entry link register stack to predict the target address of Branch Conditional to Link Register (bclr) instructions MPC7457 RISC Microprocessor Hardware Specifications, Rev Freescale Semiconductor ...

Page 3

... MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Figure 1. MPC7457 Block Diagram Features 3 ...

Page 4

... Instruction dispatch requires the following: — Instructions can be dispatched only from the three lowest IQ entries—IQ0, IQ1, and IQ2 — A maximum of three instructions can be dispatched to the issue queues per clock cycle MPC7457 RISC Microprocessor Hardware Specifications, Rev Freescale Semiconductor ...

Page 5

... On-chip, 512-Kbyte, eight-way set associative unified instruction and data cache — Fully pipelined to provide 32 bytes per clock cycle to the L1 caches — A total nine-cycle load latency for an L1 data cache miss that hits in L2 MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Features 5 ...

Page 6

... L2 cache is fully pipelined to provide 256 bits per processor clock cycle to the L1 cache — As many as eight outstanding, out-of-order, cache misses are allowed between the L1 data cache and L2/L3 bus — As many as 16 out-of-order transactions can be present on the MPX bus MPC7457 RISC Microprocessor Hardware Specifications, Rev Freescale Semiconductor ...

Page 7

... IEEE 1149.1 JTAG interface — Array built-in self test (ABIST)—factory test only • Reliability and serviceability — Parity checking on system bus and L3 cache bus — Parity checking on the L2 and L3 cache tag arrays MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Features 7 ...

Page 8

... MPC7450/MPC7451/ MPC7455/MPC7445 MPC7441 Branch 3 + Branch 16, 16, 16 16, 16 (any units) 2 (any units entry × 3 queues 1 entry × 3 queues In order, 4 queues In order, 4 queues In order In order BTIC, BHT, link stack BTIC, BHT, link stack 128-entry, 4-way 128-entry, 4-way 2K-entry 2K-entry Freescale Semiconductor ...

Page 9

... Data stream touch engines Cache level Size/associativity Access width Number of 32-byte sectors/line Parity MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Comparison with the MPC7455, MPC7445, MPC7450, MPC7451, and MPC7441 MPC7457/MPC7447 MPC7455/MPC7445 6 Execution Unit Timings (Latency-Throughput) 3-1, 4-1, 3-1 4-2, 5-2, 4-2 ...

Page 10

... MPC7457: Surface mount 483 ceramic ball grid array (CBGA) 1.3 V ± nominal 1.8 V ±5% DC, or 2.5 V ±5% DC, or 1.5 V ±5% DC (L3 interface only, not implemented on MPC7447) characteristics.Table 2 MPC7450/MPC7451/ MPC7441 8-way 8-way MSUG2 DDR, LW, PB2 MB MB Byte Byte provides the Freescale Semiconductor ...

Page 11

... Caution must not exceed OV DD 10.V may overshoot/undershoot to a voltage and for a maximum duration as shown in in Figure 2 shows the undershoot and overshoot voltage on the MPC7457. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 2. Absolute Maximum Ratings Symbol AV BVSEL = 0 OV BVSEL = HRESET L3VSEL = ¬ ...

Page 12

... MPC7457 RISC Microprocessor Hardware Specifications, Rev 20 / GND Not to exceed 10 SYSCLK Figure 2. Overshoot/Undershoot Voltage Table 3. Input Threshold Voltage Setting L3VSEL Signal 0 ¬HRESET HRESET 1 / Table L3 Bus Input Threshold is 1 Relative to: 1.8 V 1.5 V 2.5 V 2.5 V voltages supplied. See notes in Table Freescale Semiconductor 3. The Notes ...

Page 13

... Junction-to-ambient thermal resistance, natural convection Junction-to-ambient thermal resistance, natural convection, four-layer (2s2p) board Junction-to-ambient thermal resistance, 200 ft/min airflow, single-layer (1s) board Junction-to-ambient thermal resistance, 200 ft/min airflow, four-layer (2s2p) board Junction-to-board thermal resistance Junction-to-case thermal resistance MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Symbol ...

Page 14

... Value Unit MPC7447 MPC7457 6.8 6.8 ppm/°C Max Unit × × 0.65 OV / / × 0. × 0. µA 30 µA – 0.45 — – 0.45 — — V 0.45 V 0.45 V 0.6 V Freescale Semiconductor Notes Notes ...

Page 15

... Doze mode is not a user-definable state intermediate state between full-power and either nap or sleep mode result, power consumption for this mode is not tested. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 4. Nominal ...

Page 16

... Table 8 SYSCLK Section 9.1.1, “Core 1200 MHz 1267 MHz Unit Min Max Min Max 600 1200 600 1267 MHz 1200 2400 1200 2534 MHz 33 167 33 167 MHz 6 — 1.0 — 1 — 150 — 150 ps Freescale Semiconductor is Notes ...

Page 17

... Processor Bus AC Specifications Table 9 provides the processor bus AC timing specifications for the MPC7457 as defined in Figure 5. Timing specifications for the L3 bus are provided in Specifications.” MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 4. Maximum Processor Core Frequency 867 MHz 1000 MHz Min ...

Page 18

... Speed Grades Unit Notes Min Max ns 1.8 — 1.8 — 1.8 — 1.8 — — 0 — 0 — 0 — ns — 2.0 — 2.0 — 2.0 ns 0.5 — 0.5 — 0.5 — 0.5 — ns — 3.5 ns — SYSCLK — SYSCLK 6, 7 Freescale Semiconductor 8 8 ...

Page 19

... These values are guaranteed by design and not tested. These inputs must remain stable after the second sample. See Figure 4 provides the AC test load for the MPC7457. Output MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 4. 2 Symbol t ...

Page 20

... VM = Midpoint Voltage (OV DD /2) Figure 5. Mode Input Timing Diagram AVKH t IVKH t MVKH t t KHAV t t KHDV t KHOV KHTSV t KHARV VM = Midpoint Voltage (OV /2) DD Figure 6. Input/Output Timing Diagram VM 2nd Sample VM t AXKH t IXKH t MXKH KHAX KHDX KHOX t KHOZ KHTSPZ t KHTSV t KHTSX t KHARPZ t KHARP t KHARX Freescale Semiconductor ...

Page 21

... L3 clock cycle time L3 clock duty cycle L3 clock output-to-output skew (L3_CLK0 to L3_CLK1) L3 clock output-to-output skew (L3_CLK[0:1] to L3_ECHO_CLK[1,3]) MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Figure 7. Table 4. Device Revision (L3 I/O Voltage) Rev 1.1. (All I/O Modes) Symbol Rev 1.2 (1.5-V I/O Mode) ...

Page 22

... Figure 7. t L3_CLK t CHCL Rev 1.2 Unit (1.8-, 2.5-V I/O Modes) Min Typ Max — — ± Section 5.2.3, “L3 Clock 3, and voltage supplied at GV must match L3CR L3CF VM t L3CSKW1 VM t L3CSKW2 VM t L3CSKW2 Freescale Semiconductor Notes 5 ...

Page 23

... For more information, see the MPC7450 RISC Microprocessor Family User’s Manual. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor = 50 Ω Figure 8. AC Test Load for the L3 Interface ...

Page 24

... MPC7457 RISC Microprocessor Hardware Specifications, Rev Table 4. Output Valid Time Value Parameter Change 2 Symbol 0b00 t 0 L3CHOV 0b01 +50 0b10 +100 0b11 +150 Symbol Max Unit t 3 L3_CLK ECI Output Hold Time Unit Parameter 3 3 Change 2 Symbol L3CHOX +50 +100 +150 Freescale Semiconductor Notes Notes 4 ...

Page 25

... Inputs to the MPC7457 are source-synchronous with the CQ clock generated by the DDR MSUG2 SRAMs. These CQ clocks are received on the L3_ECHO_CLKn inputs of the MPC7457. An internal circuit delays the incoming L3_ECHO_CLKn signal such that it is positioned within the valid data MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 4. Output Valid Time ...

Page 26

... I/O Modes) Min Max — 0.75 ns (– t /4) — ns L3CLK + 0.70 (t /4) — ns L3CLK + 0.70 /4) — (– t /4) ns L3CLK + 0.50 — (t /4) ns L3CLK + 0.65 (t /4) — ns L3CLK – 0.50 (t /4) — ns L3CLK – 0.50 /4) — (– t /4) ns L3CLK + 0.60 Freescale Semiconductor 8. Notes ...

Page 27

... Assumes default value of L3OHCR. See information I/O voltage mode must be configured by L3VSEL as described in selected as specified in Table 4. See MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 4. Device Revision (L3 I/O Voltage) Rev 1.1. (All I/O Modes) Symbol Rev 1.2 (1.5-V I/O Mode) ...

Page 28

... MPC7457 RISC Microprocessor Hardware Specifications, Rev L3ADDR[18:0] L3_CNTL[0] L3_CNTL[1] L3_ECHO_CLK[0] {L3DATA[0:15], L3DP[0:1]} L3_CLK[0] {L3DATA[16:31], L3DP[2:3]} L3_ECHO_CLK[1] L3ECHO_CLK[2] {L3_DATA[32:47], L3DP[4:5]} L3_CLK[1] {L3DATA[48:63], L3DP[6:7]} L3_ECHO_CLK[3] SRAM 0 SA[18:0] B3 GND B1 G GND B2 LBO GND D[0:17 D[18:35 SRAM 1 SA[18:0] B3 GND B1 G GND B2 CQ LBO GND D[0:17 D[18:35 Freescale Semiconductor ...

Page 29

... SRAMs. The MPC7457 will latch the incoming data on the rising edge of L3_ECHO_CLK0 and L3_ECHO_CLK2. Table 14 provides the L3 bus interface AC timing specifications for the configuration shown in assuming the timing relationships of MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor L3CHOV ...

Page 30

... Input timings are measured at the pins. Section 5.2.4.1, “Effects of L3OHCR Settings on L3 Bus AC Voltage Modes Unit Min Max — 0.75 ns 0.1 — ns — 0.7 ns — 2.5 ns — 1.8 ns 1.4 — ns 1.0 — ns — 3.0 ns — 3 Specifications,” for more Freescale Semiconductor Notes ...

Page 31

... Transmit (MPC7457 to SRAM) Aligned Signals L3_ECHO_CLK[2] L3_ECHO_CLK[3] Note recommended by SRAM manufacturer for single-ended clocking. Figure 11. Typical Synchronous 1-MByte L3 Cache Late Write or PB2 Interface MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor L3_ADDR[16:0] L3_CNTL[0] L3_CNTL[1] {L3_DATA[0:15], L3_DP[0:1]} L3_CLK[0] {L3_DATA[16:31], L3_DP[2:3]} {L3_DATA[32:47], L3_DP[4:5]} ...

Page 32

... MPC7457 RISC Microprocessor Hardware Specifications, Rev L3DVEH VM = Midpoint Voltage (GV DD Table 4. Symbol f TCLK t TCLK t JHJL t and TRST t DVJH t IVJH t DXJH t IXJH t L3CHOX t L3CHOZ t L3CHDX t L3CHDZ t L3DXEH /2) Figure 14 through 1 Min Max Unit 0 33.3 MHz 30 — — — — 0 — — 25 — Freescale Semiconductor Notes ...

Page 33

... Figure 13. Alternate AC Test Load for the JTAG Interface Figure 14 provides the JTAG clock input timing diagram. TCLK VM Figure 14. JTAG Clock Input Timing Diagram Figure 15 provides the TRST timing diagram. VM TRST MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 4. Symbol t JLDV t JLOV t JLDX t ...

Page 34

... MPC7457 RISC Microprocessor Hardware Specifications, Rev DVJH t JLDV t JLDX t JLDZ Output Data Valid VM = Midpoint Voltage (OV DD Figure 16. Boundary-Scan Timing Diagram VM t IVJH t JLOV t JLOX t JLOZ VM = Midpoint Voltage ( DXJH Input Data Valid Output Data Valid / IXJH Input Data Valid Output Data Valid /2) Freescale Semiconductor ...

Page 35

... Part B shows the side profile of the CBGA package to indicate the direction of the top surface view. Part Part B Substrate Assembly Encapsulant Figure 18. Pinout of the MPC7447, 360 CBGA Package as Viewed from the Top Surface MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Not to Scale View Pin Assignments Die 35 ...

Page 36

... Part B shows the side profile of the CBGA package to indicate the direction of the top surface view. Part Part B Substrate Assembly Figure 19. Pinout of the MPC7457, 483 CBGA Package as Viewed from the Top Surface MPC7457 RISC Microprocessor Hardware Specifications, Rev Not to Scale View Encapsulant Die Freescale Semiconductor ...

Page 37

... T17, W3, V17, U4, U8, U7, R7, P6, R8, W8, T8 DBG M2 DP[0:7] T3, W4, T4, W9, M6, V3, N8, W6 DRDY R3 DTI[0:3] G1, K1, P1, N1 EXT_QUAL A11 GBL E2 MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor NOTE Pin Number Pinout Listings Table 17 provides the pinout 1 Active I/O I/F Select High I/O BVSEL Low ...

Page 38

... Output BVSEL Low Input BVSEL Low Output BVSEL Low I/O BVSEL Low Input BVSEL Low Input BVSEL — Input BVSEL Low Input BVSEL High Input BVSEL Low Output BVSEL High Input BVSEL High Input BVSEL High Output BVSEL Freescale Semiconductor Notes ...

Page 39

... N2, P8, M8, W4, N6, U6, R5, Y4, P1, P4, R6, M7, N7, AA3, U4, W2, W1, W3, V4, AA1, D10, J4, G10, D9 AACK U1 AP[0:4] L5, L6, J1, H2, G5 ARTRY T2 MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Pin Number ). To program the I/O voltage, connect BVSEL to either GND (selects 1 negation by ¬HRESET (inverse of HRESET), to ensure DD DD Pin Number Pinout Listings ...

Page 40

... Output BVSEL High I/O BVSEL Low Input BVSEL High I/O BVSEL Low Output BVSEL High Input BVSEL High Input BVSEL Low I/O BVSEL — — N/A — — N/A Low Output BVSEL Low Input BVSEL Low Input BVSEL Freescale Semiconductor Notes ...

Page 41

... QACK K7 QREQ Y1 SHD[0:1] L4, L8 SMI G8 SRESET G1 SYSCLK TBEN L3 TBST B7 TCK J7 MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Pin Number Active Pinout Listings 1 I/O I/F Select High Input BVSEL High Input BVSEL High Input N/A High Output L3VSEL High Output L3VSEL ...

Page 42

... High Output BVSEL Low Input BVSEL — Input BVSEL — Input BVSEL High Input BVSEL Low Input BVSEL Low I/O BVSEL High Output BVSEL High I/O BVSEL Low Output BVSEL — — N/A — — N/A or left unconnected. Freescale Semiconductor Notes ...

Page 43

... The package parameters are as provided in the following list. The package type is 25 ceramic ball grid array (CBGA). Package outline Interconnects Pitch Minimum module height 2.72 mm Maximum module height3.24 mm Ball diameter MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor × × 360 (19 19 ball array – 1) 1.27 mm (50 mil) 0.89 mm (35 mil) Package Description × ...

Page 44

... WITH A BALL MISSING FROM THE ARRAY. Millimeters DIM MIN MAX A 2.72 3.20 A1 0.80 1.00 A2 1.10 1.30 A3 — 0.6 b 0.82 0.93 D 25.00 BSC D1 — 11 8.0 — D3 — 6 10.9 11 1.27 BSC A E 25.00 BSC E1 — 11.3 E2 8.0 — E3 — 6.5 E4 9.55 9.75 Freescale Semiconductor ...

Page 45

... C1-1 C2-1 C3-1 C1-2 C2-2 C18-2 C17-2 C16-2 C15-2 C14-2 C13-2 C18-1 C17-1 C16-1 Figure 21. Substrate Bypass Capacitors for the MPC7447, 360 CBGA MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor C4-1 C5-1 C6-1 C3-2 C4-2 C5-2 C6-2 C15-1 C14-1 C13-1 ...

Page 46

... Package outline Interconnects Pitch Minimum module height — Maximum module height3.22 mm Ball diameter MPC7457 RISC Microprocessor Hardware Specifications, Rev × × 483 (22 22 ball array – 1) 1.27 mm (50 mil) 0.89 mm (35 mil) × 29 mm, 483 ceramic Freescale Semiconductor ...

Page 47

... Mechanical Dimensions for the MPC7457, 483 CBGA or RoHS BGA Figure 22 provides the mechanical dimensions and bottom surface nomenclature for the MPC7457, 483 CBGA package. A1 CORNER 0 111213141516 e Figure 22. Mechanical Dimensions and Bottom Surface Nomenclature for the MPC7457, MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor 171819 ...

Page 48

... GND GV DD C13 GND V DD C14 GND V DD C15 GND V DD C16 GND OV DD C17 GND V DD C18 GND OV DD C19 GND V DD C20 GND V DD C21 GND OV DD C22 GND V DD C23 GND V DD C24 GND RoHS BGA Freescale Semiconductor ...

Page 49

... MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 18 for a set of example frequencies. In this example, Table 8. Note that these configurations were different in Example Bus-to-Core Frequency in MHz (VCO Frequency in MHz) Bus (SYSCLK) Frequency VCO 33 ...

Page 50

... Freescale Semiconductor 167 MHz ...

Page 51

... MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Example Bus-to-Core Frequency in MHz (VCO Frequency in MHz) Bus (SYSCLK) Frequency VCO 33.3 50 66.6 MHz MHz MHz PLL off, no core clocking occurs Table 19. Sample Core-to-L3 Frequencies ÷ ...

Page 52

... Section 5.2.3, Table 8 Max Unit Notes 50 kHz 1 1 Table 8. Freescale Semiconductor ÷8 131 138 144 150 156 163 ...

Page 53

... GV , and These bulk capacitors should have a low equivalent series resistance (ESR) rating to ensure the quick MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor pin to minimize noise coupled from nearby DD 10 Ω 2.2 µF 2.2 µF Low ESL Surface Mount Capacitors GND Figure 24 ...

Page 54

... R are designed to be close to each other in value Pad Data R P OGND Figure 25. Driver Impedance Measurement , and GND pins in the DD DD power plane, and DD or GND. Then, the value of DD 25). is trimmed until the voltage at the N / SW2 SW1 Freescale Semiconductor then P ...

Page 55

... Other data bus receivers in the system, however, may require pull-ups, or that those signals be otherwise driven by the system during inactive periods by the system. The data bus signals are: D[0:63] and DP[0:7]. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 21. Impedance Characteristics 1.8 V ± ...

Page 56

... Figure 26 is common to all known emulators. MPC7457 RISC Microprocessor Hardware Specifications, Rev allows the COP port to independently assert HRESET or TRST, Ω isolation resistor so that it is asserted when the adds many benefits—breakpoints, watchpoints, register and memory Figure 26; consequently, many different Freescale Semiconductor ...

Page 57

... To preserve correct power-down operation, QACK should be merged via logic so that it also can be driven by the PCI bridge. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor is usually connected to the PCI bridge chip in a system and is an System Design Information ...

Page 58

... CHKSTP_OUT 15 10 kΩ CHKSTP_IN 8 TMS 9 TDO 1 TDI 3 TCK 7 QACK kΩ kΩ 16 with a 10-kΩ pull-up resistor. DD Figure 26. JTAG Interface Connection SRESET HRESET 10 kΩ kΩ kΩ kΩ TRST kΩ CHKSTP_OUT kΩ CHKSTP_IN TMS TDO TDI TCK QACK Freescale Semiconductor ...

Page 59

... Alhambra Road Warwick, RI 02886 Internet: www.calgregthermalsolutions.com International Electronic Research Corporation (IERC) 413 North Moss St. Burbank, CA 91502 Internet: www.ctscorp.com MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Figure 27); however, due to the potential large CBGA Package Heat Sink Heat Sink Clip Thermal Printed-Circuit Board ...

Page 60

... Thus, the thermal interface material and the heat sink conduction/convective thermal resistances are the dominant terms. MPC7457 RISC Microprocessor Hardware Specifications, Rev 800-522-6752 603-635-5102 Table 5, the intrinsic conduction thermal resistance Radiation Convection Heat Sink Printed-Circuit Board Radiation Convection Thermal Interface Material Die/Package Die Junction Package/Leads Freescale Semiconductor ...

Page 61

... There are several commercially available thermal interfaces and adhesive materials provided by the following vendors: MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Silicone Sheet (0.006 in.) Bare Joint Floroether Oil Sheet (0.007 in.) Graphite/Oil Sheet (0 ...

Page 62

... The thermal resistance of the thermal interface material (R MPC7457 RISC Microprocessor Hardware Specifications, Rev 800-347-4572 781-935-4850 800-248-2481 888-642-7674 888-246-9050 × θJC θint θ should be maintained less than the value specified may be in the range of 5° typically about 1.5°C/W. For θint Freescale Semiconductor ) a ...

Page 63

... The solder ball and air layer is modeled with the same horizontal dimensions as the substrate and is 0.9 mm thick. It can also be modeled as a collapsed volume using orthotropic material properties: 0.034 W/(m • the xy-plane direction and 3.8 W/(m • the direction of the z-axis. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor of 5°C, a CBGA package obtained 30° ...

Page 64

... Figure 30. Recommended Thermal Model of MPC7447 and MPC7457 MPC7457 RISC Microprocessor Hardware Specifications, Rev Value Unit 0.6 W/(m • 0.034 0.034 3.8 y Die Bump and Underfill z Substrate Solder and Air Side View of Model (Not to Scale) x Substrate Die Top View of Model (Not to Scale) Freescale Semiconductor ...

Page 65

... MPC7457 devices to date conform to this table. Section 9.6: Table 24: Changed title to include document order information for MPC74x7RXnnnnNx series part number specification. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Table 22. Document Revision History Substantive Change(s) Added information about unused L3_ADDR signals. Document Revision History 65 ...

Page 66

... Added pull-up/pull-down recommendations for CKSTP_IN and PLL_CFG[0:4] to Section 1.9.6. 1.1 Nontechnical reformatting. MPC7457 RISC Microprocessor Hardware Specifications, Rev Substantive Change(s) and and V for SYSCLK input is the same as for other input Table 10. L3CSKW1 and t to Table 11. CO ECI , and t in Table 9. KHOV KHOX IVKH IXKH Freescale Semiconductor ...

Page 67

... Part Numbers Fully Addressed by This Document Table 23 provides the Freescale part numbering nomenclature for the MPC7457. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Substantive Change(s) lists the part numbers which do not fully conform to the specifications of Part Numbering and Marking Note that the individual part numbers Section 11.2, “ ...

Page 68

... L x Revision Level B: 1.1; PVR = 8002 0101 C: 1.2; PVR = 8002 0102 N x Revision Level B: 1.1; PVR = 8002 0101 B: 1.1; PVR = 8002 0101 C: 1.2; PVR = 8002 0102 Freescale Semiconductor ...

Page 69

... Part Marking Parts are marked as the examples shown in MC7447 RX1nnnLx MMMMMM ATWLYYWWA Notes : MMMMMM is the 6-digit mask number. ATWLYYWWA is the traceability code. MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor (Document Order No. MPC7457ECS02AD) RX nnnn Processor Package Frequency RX = CBGA 1000 L: 1.3 V ± 1267 (Document Order No ...

Page 70

... Part Numbering and Marking THIS PAGE INTENTIONALLY LEFT BLANK MPC7457 RISC Microprocessor Hardware Specifications, Rev Freescale Semiconductor ...

Page 71

... THIS PAGE INTENTIONALLY LEFT BLANK MPC7457 RISC Microprocessor Hardware Specifications, Rev. 7 Freescale Semiconductor Part Numbering and Marking 71 ...

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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...

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