XPC823VR81B2T Freescale Semiconductor, XPC823VR81B2T Datasheet
XPC823VR81B2T
Specifications of XPC823VR81B2T
Available stocks
Related parts for XPC823VR81B2T
XPC823VR81B2T Summary of contents
Page 1
... However advised that precautions be taken to avoid application of any voltages higher than the maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (either GND or V © Freescale Semiconductor, Inc., 2004. All rights reserved. www.motorola.com if you are using a frequency other than ...
Page 2
... Freescale Semiconductor, Inc. MAXIMUM RATINGS (GND = 0V) RATING Supply Voltage Input Voltage (JTAG and GPIO) Input Voltage (All other pins) Operating Temperature Storage Temperature Range NOTES: 1. Functional operating conditions are given in DC Electrical Characteristics (VCC = 3 Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not guaranteed ...
Page 3
... Freescale Semiconductor, Inc. POWER CONSIDERATIONS The average chip-junction temperature ¥ where T = Ambient Temperature Package Thermal Resistance INT I INT Power Dissipation on Input and Output PinsÑUser Determined I/O For most applications P < 0.3 I/O relationship between P and Õ 273 ¥ Solving equations (1) and (2) for K gives + 273 ¥ ...
Page 4
... Freescale Semiconductor, Inc. DC ELECTRICAL CHARACTERISTICS CHARACTERISTIC Input High Voltage (for JTAG and GPIO) Input High Voltage (all other pins) Input Low Voltage EXTAL and EXTCLK Input High Voltage Input Leakage Current 5 Hi-z (Off State) Leakage Current, V Signal Low Input Current 0.8 V ...
Page 5
... Freescale Semiconductor, Inc. AC ELECTRICAL CHARACTERISTICS 2.0V CLKOUT B OUTPUTS OUTPUTS INPUTS INPUTS A = MAXIMUM OUTPUT DELAY SPECIFICATION B = MINIMUM OUTPUT HOLD TIME MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 0.8V A 2.0V 2.0V 0.8V 0. 2.0V 0.8V C 2.0V 2.0V 0.8V 0.8V 2.0V 0. MINIMUM INPUT SETUP TIME SPECIFICATION D = MINIMUM INPUT HOLD TIME SPECIFICATION Go to: www ...
Page 6
... Freescale Semiconductor, Inc. EXTERNAL BUS ELECTRICAL CHARACTERISTICS NUM CHARACTERISTIC B1 CLKOUT Period EXTCLK to CLKOUT Phase Skew (EXTCLK>15MHz and B1a MF £ 2) EXTCLK to CLKOUT Phase Skew (EXTCLK>10MHz and B1b MF £ 10) B1c CLKOUT Phase Jitter (EXTCLK>15MHz and MF£2) B1d CLKOUT Phase Jitter (EXTCLK>10MHz and MF£10) B1e CLKOUT Frequency Jitter (MF< ...
Page 7
... Freescale Semiconductor, Inc. Table 1. Bus Operation Timing (Continued) NUM CHARACTERISTIC B13a CLKOUT to TA (When Driven by the Memory Controller or PCMCIA Interface) B14 CLKOUT to TEA Assertion B15 CLKOUT to TEA Hi Z B16 TA, BI Valid to CLKOUT (Setup Time) B16a TEA, KR, RETRY Valid to CLKOUT (Setup Time) ...
Page 8
... Freescale Semiconductor, Inc. Table 1. Bus Operation Timing (Continued) NUM CHARACTERISTIC CLKOUT Falling Edge to WE(0:3) Negated -GPCM-Write B28c Access TRLX = Ô0Õ, CSNT = Ô1Õ, EBDF=1 B28d CLKOUT Falling Edge to CS Negated -GPCM-Write Access TRLX = Ô0Õ, CSNT = Ô1Õ, ACS = Ô10Õ or ACS=Õ11Õ, EBDF = 1 ...
Page 9
... Freescale Semiconductor, Inc. Table 1. Bus Operation Timing (Continued) NUM CHARACTERISTIC B31a CLKOUT Falling Edge to CS valid as requested by CST1 in the corresponding word of the UPM, EBDF = 0 B31b CLKOUT Rising Edge to CS valid as requested by CST2 in the corresponding word of the UPM CLKOUT Rising Edge to CS valid as requested by CST3 in ...
Page 10
... Freescale Semiconductor, Inc. Table 1. Bus Operation Timing (Continued) NUM CHARACTERISTIC A(6:31), TSIZ(0:1), RD/WR, BURST, Valid to CLKOUT Rising B40 Edge B41 TS Valid to CLKOUT Rising Edge (Setup Time) B42 CLKOUT Rising Edge to TS Valid (Hold Time) B43 AS Negation to Memory Controller Signals Negation NOTES: 1 ...
Page 11
... Freescale Semiconductor, Inc. CLKOUT B8 B7 OUTPUT SIGNALS B8a B7a OUTPUT SIGNALS B8b B7b OUTPUT SIGNALS Figure 2. Synchronous Output Signals Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com ...
Page 12
... Freescale Semiconductor, Inc. CLKOUT B11 TS, BB B11a TA, BI B14 TEA Figure 3. Synchronous Active Pull-Up and Open-Drain Outputs Signals Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B13 B12 B13a B12a B15 ...
Page 13
... Freescale Semiconductor, Inc. CLKOUT B16 TA, BI, TEA B16a TEA, RETRY, KR B16b BB, BG, BR Figure 4. Synchronous Input Signals Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B17 B17a B17 13 ...
Page 14
... Freescale Semiconductor, Inc. CLKOUT TA D(0:31), DP(0:3) Figure 5. Input Data In Normal Case Timing Diagram CLKOUT TA D(0:31), DP(0:3) Figure 6. Input Data When Controlled by the UPM Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B16 B17 B18 B19 B21 ...
Page 15
... Freescale Semiconductor, Inc. CLKOUT TS A(6:31) CSx OE WE(0:3) D(0:31), DP(0:3) Figure 7. External Bus Read Timing Diagram (GPCM ControlledÐACS = Ô00Õ) CLKOUT TS A(6:31) CSx OE D(0:31), DP(0:3) Figure 8. External Bus Read Timing Diagram (GPCM ControlledÐTRLX = Ô0Õ, ACS = Ô10Õ) MPC823 ELECTRICAL SPECIFICATIONS ...
Page 16
... Freescale Semiconductor, Inc. CLKOUT B11 TS B8 A(6:31) CSx B24a B25 OE D(0:31), DP(0:3) Figure 9. External Bus Read Timing Diagram (GPCM ControlledÐTRLX = Ô0Õ, ACS = Ô11Õ) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B12 B22b B23 B22c B26 ...
Page 17
... Freescale Semiconductor, Inc. CLKOUT B11 TS B8 A(6:31) CSx B27 B27a OE D(0:31), DP(0:3) Figure 10. External Bus Read Timing Diagram (GPCM ControlledÐTRLX = Ô1Õ, ACS = Ô10Õ, ACS = Ô11Õ) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B12 B22a ...
Page 18
... Freescale Semiconductor, Inc. CLKOUT B11 B12 TS B8 A(6:31) B22 CSx B25 (0:3) WE B26 OE B8 D(0:31), DP(0:3) Figure 11. External Bus Write Timing Diagram (GPCM ControlledÐTRLX = Ô0Õ, CSNT = Ô0Õ) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B30 ...
Page 19
... Freescale Semiconductor, Inc. CLKOUT B11 TS B8 A(6:31) B22 CSx WE(0:3) OE D(0:31), DP(0:3) Figure 12. External Bus Write Timing Diagram (GPCM ControlledÐTRLX = Ô0Õ, CSNT = Ô1Õ) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B12 B30 B28b B28d B25 ...
Page 20
... Freescale Semiconductor, Inc. CLKOUT B11 B12 TS B8 A(6:31) B22 CSx (0:3) WE B26 OE D(0:31), DP(0:3) Figure 13. External Bus Write Timing Diagram (GPCM ControlledÐTRLX = Ô1Õ, CSNT = Ô1Õ) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B28d B28b B25 ...
Page 21
... Freescale Semiconductor, Inc. CLKOUT B8 A(6:31) CSx B34 B34a BS_AB(0:3) B35 B35a GPLA(0:5), GPLB(0:5) B36 Figure 14. External Bus Timing Diagram (UPM-Controlled Signals) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, B31d B31a B31 B31b B34b B32d B32a B32 B32b B35b B33 Go to: www.freescale.com ...
Page 22
... Freescale Semiconductor, Inc. CLKOUT B37 UPWAIT CSx BS_AB(0:3) GPLA(0:5), GPLB(0:5) Figure 15. Asynchronous UPWAIT Asserted Detection in UPM Handled Cycles Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com B38 ...
Page 23
... Freescale Semiconductor, Inc. CLKOUT B37 UPWAIT CSx BS_AB(0:3) GPLA(0:5), GPLB(0:5) Figure 16. Asynchronous UPWAIT Negated Detection in UPM Handled Cycles Timing Diagram CLKOUT B41 TS B40 A(6:31), TSIZ(0:1), RD/WR, BURST CSx Figure 17. Synchronous External Master Access Timing Diagram (GPCM HandledÐACS = Ô00Õ) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www ...
Page 24
... Freescale Semiconductor, Inc. CLKOUT AS B40 A(6:31), TSIZ(0:1), RD/WR CSx Figure 18. Asynchronous External Master Memory Access Timing Diagram (GPCM ControlledÐACS = Õ00Õ) AS CSx, WE(0:3), BS(0:3), OE, GPLx, Figure 19. Asynchronous External Master Timing Diagram (Control Signals Negation Time) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www ...
Page 25
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC I39 IRQx valid to CLKOUT rising edge (setup time) I40 IRQx hold time after CLKOUT I41 IRQx pulse width low I42 IRQx pulse width high I43 IRQx edge to edge time NOTES: 1. The timings I39 and I40 describe the testing conditions under which the IRQ lines are tested when defined as level sensitive ...
Page 26
... Freescale Semiconductor, Inc. CLKOUT IRQx I43 Figure 21. Interrupt Detection Timing Diagram for External Edge-Sensitive Lines MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com I39 I43 I41 I42 ...
Page 27
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC P44 A(6:31), REG valid to PCMCIA strobe asserted P45 A(6:31), REG valid to ALE negation P46 CLKOUT to REG valid P47 CLKOUT to REG invalid P48 CLKOUT to CE1, CE2 asserted P49 CLKOUT to CE1, CE2 negated P50 CLKOUT to PCOE, IORD, PCWE, IOWR assert ...
Page 28
... Freescale Semiconductor, Inc. CLKOUT TS A(0:31) P46 REG CE[1:2] P48 PCOE, PCOE, IORD P52 ALE D(0:31) Figure 22. PCMCIA Access Cycles Timing Diagram (External Bus Read) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com P44 P45 P50 P53 B18 P47 P49 ...
Page 29
... Freescale Semiconductor, Inc. CLKOUT TS A[0:31] P46 REG CE[1:2] P48 PCOE, IORD P52 ALE D[0:31] Figure 23. PCMCIA Access Cycles Timing Diagram (External Bus Write) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com P44 P45 P50 P53 B8 P47 P49 P51 P52 ...
Page 30
... Freescale Semiconductor, Inc. CLKOUT WAITx Figure 24. PCMCIA Wait Signals Detection Timing Diagram CLKOUT WAITx Figure 25. PCMCIA Wait Signals Detection Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com P55 P56 P55 P56 ...
Page 31
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC P57 CLKOUT to OPx Valid P58 HRESET negated to OPx drive P59 IP_Bx valid to CLKOUT Rising Edge P60 CLKOUT Rising Edge to IP_Bx invalid NOTE: *OP2 and OP3 only. CLKOUT OUTPUT SIGNALS HRESET OP2, OP3 Figure 26. PCMCIA Output Port Timing Diagram ...
Page 32
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC D61 DSCK cycle time D62 DSCK clock pulse width D63 DSCK rise and fall times D64 DSDI input data setup time D65 DSDI data hold time D66 DSCK low to DSDO data valid D67 DSCK low to DSDO invalid ...
Page 33
... Freescale Semiconductor, Inc. DSCK D64 DSDI D66 D67 DSDO Figure 29. Debug Port Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com D65 33 ...
Page 34
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC R68 CLKOUT to HRESET high impedance R69 CLKOUT to SRESET high impedance R70 RSTCONF pulse width R71 N/A R72 Configuration data to HRESET rising edge setup time R73 Configuration data to RSTCONF rising edge setup time R74 Configuration data hold time after RSTCONF ...
Page 35
... Freescale Semiconductor, Inc. HRESET RSTCONF D(0:31) (IN) Figure 30. Reset Timing Diagram (Configuration from Data Bus) CLKOUT HRESET RSTCONF D(0:31) (OUT) (WEAK) Figure 31. Reset Timing DiagramÐMPC823 Data Bus Weak Drive During Configuration MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, R71 R73 ...
Page 36
... Freescale Semiconductor, Inc. CLKOUT SRESET R80 DSCK, DSDI Figure 32. Reset Timing DiagramÐDebug Port Configuration MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com R70 R82 R80 R81 R81 ...
Page 37
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC J82 TCK cycle time J83 TCK clock pulse width measured at 1.5V J84 TCK rise and fall times J85 TMS, TDI data setup time J86 TMS, TDI data hold time J87 TCK low to TDO data valid J88 ...
Page 38
... Freescale Semiconductor, Inc. TCK TMS, TDI TDO Figure 34. JTAGÐTest Access Port Timing Diagram TCK TRST Figure 35. JTAGÐTRST Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com J85 J86 J87 J89 J88 J91 J90 ...
Page 39
... Freescale Semiconductor, Inc. TCK J92 OUTPUT SIGNALS J93 OUTPUT SIGNALS OUTPUT SIGNALS Figure 36. Boundary Scan (JTAG) Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com J94 J96 J95 39 ...
Page 40
... Freescale Semiconductor, Inc. COMMUNICATION ELECTRICAL CHARACTERISTICS Table 8. Parallel Input/Output Port Timing NUM CHARACTERISTIC 29 Data-in setup time to clock high 30 Data-in hold time from clock high 31 Clock high to data-out valid (CPU writes data, control, or direction) CLKOUT DATA IN DATA OUT Figure 37. Parallel Input/Output Data-In/Data-Out Timing Diagram ...
Page 41
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC 40 DREQ setup time to clock high 41 DREQ hold time from clock high 42 SDACK assertion delay from clock high 43 SDACK negation delay from clock low 44 SDACK negation delay from TA low 45 SDACK negation delay from clock high 46 TA assertion to falling edge of the clock setup time NOTE: Applies to external TA ...
Page 42
... Freescale Semiconductor, Inc. CLKOUT (OUTPUT) TS (OUTPUT (OUTPUT) DATA TA (OUTPUT) SDACK Figure 39. SDACK Timing DiagramÐPeripheral Write, TA Sampled Low at the Falling Edge of the Clock MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com ...
Page 43
... Freescale Semiconductor, Inc. CLKOUT (OUTPUT) TS (OUTPUT (OUTPUT) DATA TA (OUTPUT) SDACK Figure 40. SDACK Timing DiagramÐPeripheral Write, TA Sampled High at the Falling Edge of the Clock MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product to: www.freescale.com 44 43 ...
Page 44
... Freescale Semiconductor, Inc. CLKOUT (OUTPUT) TS (OUTPUT (OUTPUT) DATA TA (OUTPUT) SDACK Figure 41. SDACK Timing DiagramÐPeripheral Read MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product to: www.freescale.com 45 ...
Page 45
... Freescale Semiconductor, Inc. Table 10. Baud Rate Generator Timing NUM CHARACTERISTIC 50 BRGO rise and fall times 51 BRGO duty cycle 52 BRGO cycle 50 BRGOx Figure 42. Baud Rate Generator Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 25MHZ 40MHZ MIN MAX MIN Ñ ...
Page 46
... Freescale Semiconductor, Inc. Table 11. General-Purpose Timers Timing NUM CHARACTERISTIC 61 TIN/TGATE rise and fall times 62 TIN/TGATE low time 63 TIN/TGATE high time 64 TIN/TGATE cycle time 65 CLKO low to TOUT valid CLKOUT 61 TIN / TGATE (INPUT) TOUT (OUTPUT) Figure 43. General-Purpose Timers Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS ...
Page 47
... Freescale Semiconductor, Inc. Table 12. Serial Interface Timing NUM CHARACTERISTIC L1RCLK and L1TCLK frequency (DSC= L1RCLK and L1TCLK width low (DSC=0) 71a L1RCLK and L1TCLK width high (DSC=0) 72 L1TXD, L1ST(1Ð8), L1RQ, L1CLKO rise and fall times 73 L1RSYNC, L1TSYNC valid to L1CLK edge ...
Page 48
... Freescale Semiconductor, Inc. 71 L1RCLK (FE=0, CE=0) (INPUT) L1RCLK (FE=1, CE=1) (INPUT) 75 L1RSYNC (INPUT L1RXD (INPUT) L1ST(1-4) (OUTPUT) Figure 44. Serial Interface Receive Timing Diagram With Normal Clocking (DSC =0) MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product RFCD=1 77 BIT0 to: www.freescale.com 79 ...
Page 49
... Freescale Semiconductor, Inc. 71 L1TCLK (FE=0, CE=0) (INPUT) L1TCLK (FE=1, CE=1) (INPUT) 73 L1TSYNC (INPUT) 74 80a L1TXD BIT0 (OUTPUT) 80 78a L1ST(1-4) (OUTPUT) 78 Figure 45. Serial Interface Transmit Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product TFCD to: www.freescale.com 79 49 ...
Page 50
... Freescale Semiconductor, Inc. Table 13. Serial Communication Controller in NMSI External Timing NUM CHARACTERISTIC 100 1 RCLK1 and TCLK1 width high 101 RCLK1 and TCLK1 width low 102 RCLK1 and TCLK1 rise and fall times 103 TXD2 active delay (from TCLK1 falling edge) 104 ...
Page 51
... Freescale Semiconductor, Inc. Table 14. Serial Communication Controller in NMSI Internal Timing NUM CHARACTERISTIC 100 1 RCLK1 and TCLK1 frequency 102 RCLK1 and TCLK1 rise and all times 103 TXD2 active delay (from TCLK1 falling edge) 104 RTS1 active/inactive delay (from TCLK1 falling edge) ...
Page 52
... Freescale Semiconductor, Inc. 102 TCLK1 102 TXD2 (OUTPUT) RTS1 (OUTPUT) CTS1 (INPUT) CTS1 (SYNC INPUT) Figure 47. SCC NMSI Transmit Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 101 100 103 104 Go to: www.freescale.com 105 104 107 ...
Page 53
... Freescale Semiconductor, Inc. 102 TCLK1 102 TXD2 (OUTPUT) RTS1 (OUTPUT) CTS1 (ECHO INPUT) Figure 48. HDLC Bus Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 101 100 103 104 107 105 Go to: www.freescale.com 104 53 ...
Page 54
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC 120 CLSN (CTS2) width high 121 RCLK1 rise and fall times 122 RCLK1 width low 123 1 RCLK1 clock period 124 RXD2 setup time 125 RXD2 hold time 126 RENA (CD2) active delay (from RCLK1 rising edge of the last data bit) ...
Page 55
... Freescale Semiconductor, Inc. CLSN (CTS1) (INPUT) Figure 49. Ethernet Collision Timing Diagram 121 RCLK1 124 RXD2 (INPUT) RENA (CD1) (INPUT) Figure 50. Ethernet Receive Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 120 121 125 Go to: www.freescale.com 123 LAST BIT 127 ...
Page 56
... Freescale Semiconductor, Inc. 128 TCLK1 131 TXD2 (OUTPUT) 133 TENA (RTS1) (INPUT) RENA (CD1) (INPUT) (NOTE 2) NOTES: 1. TRANSMIT CLOCK INVERT (TCI) BIT IN THE GSMR IS SET RENA IS DEASSERTED BEFORE TENA, OR RENA IS NOT ASSERTED AT ALL DURING TRANSMIT, THEN THE CSL BIT IS SET IN THE BUFFER DESCRIPTOR AT THE END OF FRAME TRANSMISSION. ...
Page 57
... Freescale Semiconductor, Inc. Table 16. Serial Peripheral Interface Master Timing NUM CHARACTERISTIC 160 Master cycle time 161 Master clock (SCK) high or low time 162 Master data setup time (inputs) 163 Master data hold time (inputs) 164 Master data valid (after SCK edge) ...
Page 58
... Freescale Semiconductor, Inc. 161 161 SPICLK CI=0 (OUTPUT) 163 SPICLK CI=1 (OUTPUT) 162 SPIMISO MSB IN (INPUT) SPIMOSI MSB OUT (OUTPUT) 167 Figure 53. SPI Master (CP=1) Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 160 166 167 167 166 DATA ...
Page 59
... Freescale Semiconductor, Inc. Table 17. Serial Peripheral Interface Slave Timing NUM CHARACTERISTIC 170 Slave cycle time 171 Slave enable lead time 172 Slave enable lag time 173 Slave clock (SPICLK) high or low time 174 Slave sequential transfer delay (does not require deselect) ...
Page 60
... Freescale Semiconductor, Inc. SPISEL (INPUT) 173 SPICLK CI=0 (INPUT) SPICLK CI=1 (INPUT) 177 180 SPIMISO MSB OUT (OUTPUT) 175 176 SPIMOSI MSB IN (INPUT) Figure 54. SPI Slave (CP=0) Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 173 170 181 182 ...
Page 61
... Freescale Semiconductor, Inc. SPISEL (INPUT) 173 173 SPICLK CI=0 (INPUT) 171 SPICLK CI=1 (INPUT) 177 SPIMISO UNDEF (OUTPUT) 175 SPIMOSI (INPUT) Figure 55. SPI Slave (CP=1) Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com 170 182 181 182 ...
Page 62
... Freescale Semiconductor, Inc. Table 18. I NUM CHARACTERISTIC 200 SCL clock frequency (slave) 200 SCL clock frequency (master) 202 Bus free time between transmissions 203 Low period of SCL 204 High period of SCL 205 Start condition setup time 206 Start condition hold time ...
Page 63
... Freescale Semiconductor, Inc. SDA 202 203 205 SCL 206 Figure 56. I MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com 204 207 208 209 210 2 C Bus Timing Diagram 211 63 ...
Page 64
... Freescale Semiconductor, Inc. Table 20. Serial Management Controller Timing NUM CHARACTERISTIC 150 CLK1 clock period 151 CLK1 width low 151A CLK1 width high 152 CLK1 rise and fall times 153 SMTXDx active delay (from CLK1 falling edge) 154 SMRXDx/SYNC1 setup time 155 SMRXDx/SYNC1 hold time NOTE: The ratio SyncCLK/SMCLK must be greater than or equal to 2/1 ...
Page 65
... Freescale Semiconductor, Inc. NUM CHARACTERISTIC 220 Shift clock cycle time 221 Shift clock high time 223 CLOCK/HSYNC/VSYNC/OE rise and fall times 224 Data valid delay from shift clock high 225 VSYNC to HSYNC setup time 226 VSYNC hold time 227 HSYNC pulse width ...
Page 66
... Freescale Semiconductor, Inc. 224 SHIFT CLOCK DATA SHIFT CLOCK HSYNC VSYNC LCD_AC NTH LINE VSYNC HSYNC SHIFT CLOCK Figure 58. Passive Panel Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 223 221 223 228 227 225 FIRST LINE 236 Go to: www.freescale.com ...
Page 67
... Freescale Semiconductor, Inc. 227 235 SHIFT DATA OE HSYNC VSYNC OE NTH LINE VSYNC HSYNC OE Figure 59. TFT Panel Timing Diagram MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, 224 235 232 231 225 235 Go to: www.freescale.com 233 234 FIRST LINE 67 ...
Page 68
... Freescale Semiconductor, Inc. Table 22. Video Controller Timing NUM CHARACTERISTIC 240 Clock cycle time 241 Clock high time 242 CLK/HSYNC/VSYNC/BLANK/FIELD rise and fall times 243 Clock high to data valid 242 243 CLK DATA HSYNC VSYNC FIELD BLANK Figure 60. Video Controller Timing MPC823 ELECTRICAL SPECIFICATIONS ...
Page 69
... Freescale Semiconductor, Inc. MPC823 ELECTRICAL SPECIFICATIONS For More Information On This Product, Go to: www.freescale.com 69 ...
Page 70
... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...