LUPXA255A0E300 Intel, LUPXA255A0E300 Datasheet - Page 31

no-image

LUPXA255A0E300

Manufacturer Part Number
LUPXA255A0E300
Description
IC MICRO PROCESSOR 300MHZ 256BGA
Manufacturer
Intel
Datasheets

Specifications of LUPXA255A0E300

Processor Type
XScale®
Speed
300MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
867752

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LUPXA255A0E300
Manufacturer:
ATMEL
Quantity:
230
Part Number:
LUPXA255A0E300
Manufacturer:
Marvell
Quantity:
360
Part Number:
LUPXA255A0E300
Manufacturer:
INTEL
Quantity:
624
Part Number:
LUPXA255A0E300
Manufacturer:
Intel
Quantity:
10 000
Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification
Figure 3. Power-On Reset Timing
Table 15. Power-On Timing Specifications
Note: If hardware reset is entered during sleep mode, follow the proper power-supply stabilization times
indicated in
tD_NRESET
tD_NTRST
tR_VCCQ
tR_VCCN
tD_VCCN
tD_NCS0
tD_JTAG
tR_VCC
tD_VCC
tD_OUT
Symbol
NOTES:
1. nBATT_FAULT and nVDD_FAULT must be high before nRESET_OUT is deasserted or the
2. The inclusion of PWR_EN is for informational purposes only to show its relationship to VCCQ. The
processor enters sleep mode.
use of PWR_EN to bring up VCCN or VCC at power-on reset is optional depending on the system’s
power management requirements. VCCN and VCC are not dependant on the PWR_EN signal being
asserted.
VCCQ, PWR_EN
nRESET_OUT
Figure 3
JTAG PINS
VCCQ rise / stabilization time
VCCN rise / stabilization time
VCC, PLL_VCC rise / stabilization time
Delay between VCCQ applied and
VCCN applied
Delay from VCCN applied and VCC,
PLL_VCC applied
Delay between VCC, PLL_VCC stable
and nTRST de-asserted
Delay between nTRST de-asserted and
JTAG pins active, with nRESET
asserted
Delay between VCC, PLL_VCC stable
and nRESET de-asserted
Delay between nRESET de-asserted
and nRESET_OUT de--asserted
Delay between nRESET_OUT
deasserted and nCS0 asserted
nRESET
nTRST
VCCN
VCC
and nRESET timing requirements indicated in
Description
t
R_VCCQ
t
D_VCCN
t
R_VCCN
t
D_VCC
0.01
0.01
0.01
0.03
18.1
Min
400
-10
10
10
0
t
R_VCC
t
D_NTRST
t
Typical
D_NRESET
Table
Electrical Specifications
t
D_JTAG
15.
Max
18.2
100
100
420
10
t
D_OUT
Units
ms
ms
ms
ms
ms
ms
ms
ms
ms
ns
31

Related parts for LUPXA255A0E300