PALCE16V8-15JC Cypress Semiconductor Corp, PALCE16V8-15JC Datasheet

IC SPLD 8 MACROCELL 15NS 20-PLCC

PALCE16V8-15JC

Manufacturer Part Number
PALCE16V8-15JC
Description
IC SPLD 8 MACROCELL 15NS 20-PLCC
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of PALCE16V8-15JC

Programmable Type
PAL FLASH
Number Of Macrocells
8
Voltage - Input
5V
Speed
15ns
Mounting Type
Surface Mount
Package / Case
20-PLCC
Family Name
Pal®
Process Technology
EECMOS
# Macrocells
8
# I/os (max)
8
Frequency (max)
62.5MHz
Propagation Delay Time
15ns
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
20
Supply Current
90mA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1277

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PALCE16V8-15JC
Manufacturer:
CYP
Quantity:
5 510
Part Number:
PALCE16V8-15JC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
PALCE16V8-15JC
Manufacturer:
CYP
Quantity:
20 000
Part Number:
PALCE16V8-15JC/4
Manufacturer:
TI
Quantity:
59
Cypress Semiconductor Corporation
Document #: 38-03025 Rev. **
Features
• Active pull-up on data input pins
• Low power version (16V8L)
• Standard version has low power
• CMOS Flash technology for electrical erasability and
• PCI compliant
• User-programmable macrocell
reprogrammability
— 55 mA max. commercial (10, 15, 25 ns)
— 65 mA max. industrial (10, 15, 25 ns)
— 65 mA military (15 and 25 ns)
— 90 mA max. commercial (10, 15, 25 ns)
— 115 mA max. commercial (7 ns)
— 130 mA max. military/industrial (10, 15, 25 ns)
— Output polarity control
— Individually selectable for registered or combinato-
Pin Configurations
Logic Block Diagram (PDIP/CDIP)
rial operation
GND
10
OE/I
11
9
Macrocell
8
I/O
12
I
9
8
0
Macrocell
CLK/I
8
I/O
13
I
8
GND
7
1
I
I
I
I
I
I
I
I
0
1
2
3
4
5
6
8
7
3901 North First Street
Top View
1
2
3
4
5
6
7
8
9
10
Macrocell
DIP
Reprogrammable CMOS PAL
I
I/O
7
8
6
14
PROGRAMMABLE
2
AND ARRAY
(64 x 32)
20
19
18
17
16
15
14
13
12
11
Macrocell
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
OE/I
I/O
I
8
15
5
6
CC
3
7
6
5
4
3
2
1
0
9
Functional Description
The Cypress PALCE16V8 is a CMOS Flash Electrical Eras-
able second-generation programmable array logic device. It is
implemented with the familiar sum-of-product (AND-OR) logic
structure and the programmable macrocell.
• Up to 16 input terms and 8 outputs
• 7.5 ns com’l version
• 10 ns military/industrial versions
• High reliability
16V8–2
5 ns t
5 ns t
7.5 ns t
125-MHz state machine
7 ns t
10 ns t
10 ns t
62-MHz state machine
— Proven Flash technology
— 100% programming and functional testing
Macrocell
I
8
I/O
4
5
16
4
CO
S
CO
S
PD
PD
San Jose
I
I
I
I
I
3
4
5
6
7
Macrocell
17
8
I
I/O
4
3
4
5
6
7
8
5
9 10111213
3 2 1
PLCC/LCC
Top View
Macrocell
I/O
20
8
18
I
3
2
CA 95134
6
19
18
17
16
15
14
Flash Erasable,
Revised September 3, 1998
Macrocell
I/O
I/O
I/O
I/O
I/O
I/O
I
1
2
19
6
5
4
3
2
8
16V8–3
7
PALCE16V8
®
CLK/I
V
408-943-2600
1
20
CC
Device
0
16V8–1

Related parts for PALCE16V8-15JC

PALCE16V8-15JC Summary of contents

Page 1

... High reliability — Proven Flash technology — 100% programming and functional testing Functional Description The Cypress PALCE16V8 is a CMOS Flash Electrical Eras- able second-generation programmable array logic device implemented with the familiar sum-of-product (AND-OR) logic structure and the programmable macrocell. ...

Page 2

... AND array. The first product term in a mac- rocell can be used either as an internal output enable control data product term. There are a total of 18 architecture bits in the PALCE16V8 macrocell; two are global bits that apply to all macrocells and 16 that apply locally, two bits per macrocell. The architecture bits determine whether the macrocell functions as a register or combinatorial with inverting or noninverting output ...

Page 3

... Macrocell Document #: 38-03025 Rev. ** CL0 CLK CL1 x CG for pin for pin 12 and 19 0 PALCE16V8 To Adjacent 1 1 Macrocell From 0 X Adjacent Pin CL0 x I/O x 16V8–4 Page ...

Page 4

... IL IH 10, 15 Output Open, 15L, 25L MHz (counter) 10, 15 15L, 25L ns 15L, 25L ns Test Conditions MHz 2. MHz OUT Test Conditions Normal Programming Conditions PALCE16V8 Ambient Temperature + – +125 C 5V 10% – + 10% Min. Max. Unit Com’l 2.4 V Mil/Ind Com’l 0.5 ...

Page 5

... PXZ ER L · Z: Closed Document #: 38-03025 Rev. ** ALL INPUT PULSES 3.0V 90% 10% GND < OUTPUT Commercial 200 390 5 pF PALCE16V8 90% 10% < 16V8–5 TEST POINT 16V8–6 Military R R Measured Output Value 1 2 390 750 H · · 1.5V 1.5V – 0. 0.5V OL Page ...

Page 6

... Min. Max. Min. Max. Min 7 14 143 100 166 125 166 125 min previous LOW level has risen to 0.5 volts above V internal (1 measured (see Note 7 above) minus t MAX MAX3 PALCE16V8 16V8-10 16V8-15 16V8-25 Max. Min. Max. Min 7 45 62.5 41 max ...

Page 7

... OUTPUTS COMBINATORIAL OUTPUTS Power-Up Reset Waveform 10% POWER SUPPLY VOLTAGE REGISTERED ACTIVE LOW OUTPUTS CLOCK Document #: 38-03025 Rev 16V8-10 Min. Max [ [7] 10 [7, 10 [ 62.5 [7, 13 [7, 14 MAX = PALCE16V8 16V8-15 16V8-25 Min. Max. Min. Max 45.5 37 62.5 41 [10 PXZ ER [10 PXZ Unit ...

Page 8

... Functional Logic Diagram for PALCE16V8 PIN NUMBERS PRODUCT LINE FIRST CELL NUMBERS 128 160 192 224 2 256 288 320 352 384 416 448 480 3 512 544 576 608 640 672 704 736 4 768 800 832 864 896 928 960 992 5 1024 ...

Page 9

... S CO (mA) (ns) (ns) (ns) Ordering Code 115 PALCE16V8-5JC 115 7 PALCE16V8-7JC PALCE16V8-7PC 90 10 7.5 7 PALCE16V8-10JC PALCE16V8-10PC 130 10 7.5 7 PALCE16V8-10JI PALCE16V8-10PI 130 PALCE16V8-10DMB PALCE16V8-10LMB PALCE16V8-15JC PALCE16V8-15PC 130 PALCE16V8-15PI PALCE16V8-15DMB PALCE16V8-15LMB PALCE16V8-25JC PALCE16V8-25PC 130 PALCE16V8-25JI PALCE16V8-25DMB PALCE16V8-25LMB 55 10 7.5 7 PALCE16V8L-10JC PALCE16V8L-10PC PALCE16V8L-10JI PALCE16V8L-10PI PALCE16V8L-15JC PALCE16V8L-15PC ...

Page 10

... MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics Parameter Subgroups Package Diagrams Document #: 38-03025 Rev. ** Switching Characteristics Parameter 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A PALCE16V8 Subgroups 10, 11 51-80029 Page ...

Page 11

... Package Diagrams (continued) Document #: 38-03025 Rev. ** 20-Lead Plastic Leaded Chip Carrier J61 20-Square Leadless Chip Carrier L61 PALCE16V8 51-85000-A 51-80049 Page ...

Page 12

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 20-Lead (300-Mil) Molded DIP P5 PALCE16V8 51-85011-A Page ...

Page 13

... Document Title: PALCE16V8 Flash Erasable, Reprogrammable CMOS PAL® Device Document Number: 38-03025 Issue REV. ECN NO. Date ** 106370 07/11/01 Document #: 38-03025 Rev. ** Orig. of Change SZV Change from Spec Number: 38-00364 to 38-03025 PALCE16V8 Description of Change Page ...

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