AD1836AASZ Analog Devices Inc, AD1836AASZ Datasheet - Page 21

IC CODEC 4ADC/6DAC 24 BIT 52MQFP

AD1836AASZ

Manufacturer Part Number
AD1836AASZ
Description
IC CODEC 4ADC/6DAC 24 BIT 52MQFP
Manufacturer
Analog Devices Inc
Type
General Purposer
Datasheet

Specifications of AD1836AASZ

Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
4 / 6
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
105 / 108
Dynamic Range, Adcs / Dacs (db) Typ
105 / 108
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
52-BQFP
Audio Codec Type
Stereo
No. Of Adcs
4
No. Of Dacs
6
No. Of Input Channels
4
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
108dB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD1836AZ-DBRD - BOARD EVAL FOR AD1836AAD1836A-DBRD - BOARD EVAL FOR AD1836A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD1836AASZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD1836AASZRL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Table 19. ADC Control Register 3
When changing clock mode, other SPI bits that are written during the same SPI transaction may be lost. Therefore, it is recommended
that these be set separately.
Address
15, 14,
13, 12
1110
Table 20. ADC Peak Level Data Registers
Address
15, 14, 13, 12
1000 = ADC1L
1001 = ADC1R
1010 = ADC2L
1011 = ADC2R
RD/WR
11
0
Reserved
10, 9, 8
000
RD/WR
11
1
Clock Mode
7, 6
00 = 256 × f
01 = 512 × f
10 = 768 × f
Reserved
10
0
S
S
S
Function
Left Differential
I/P Select
5
0 = Differential
PGA Mode
1 = PGA/MUX
Mode (Single-
Ended Input)
Peak Level Data (10 Bits)
6 Data Bits
9:4
000000 = 0.0 dBFS
000001 = –1.0 dBFS
000010 = –2.0 dBFS
000011 = –3.0 dBFS
111100 = –60 dBFS Min
Rev. 0 | Page 21 of 24
Right
Differential
I/P Select
4
0 = Differential
PGA Mode
1 = PGA/MUX
Mode (Single-
Ended Input)
Left
MUX/PGA
Enable
3
0 = Direct
1 = MUX/PGA
4 Fixed Bits
3:0
0000
The 4 LSBs are always zero.
Left MUX
I/P Select
2
0 = I/P 0
1 = I/P 1
1
Right
MUX/PGA
Enable
0 = Direct
1 = MUX/PGA
AD1836A
Right
MUX I/P
Select
0
0 = I/P 0
1 = I/P 1

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