AD74111YRU

Manufacturer Part NumberAD74111YRU
DescriptionIC CODEC MONO AUDIO LP 16-TSSOP
ManufacturerAnalog Devices Inc
TypeAudio Codec
AD74111YRU datasheet
 


Specifications of AD74111YRU

Rohs StatusRoHS non-compliantData InterfaceSerial
Resolution (bits)24 bNumber Of Adcs / Dacs1 / 1
Sigma DeltaYesS/n Ratio, Adcs / Dacs (db) Typ77 / 89
Dynamic Range, Adcs / Dacs (db) Typ87 / 95Voltage - Supply, Analog2.5V
Voltage - Supply, Digital2.5VOperating Temperature-40°C ~ 105°C
Mounting TypeSurface MountPackage / Case16-TSSOP (0.173", 4.40mm Width)
For Use WithEVAL-AD74111EBZ - BOARD EVAL FOR AD74111  
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
Page 1/20

Download datasheet (345Kb)Embed
Next
FEATURES
2.5 V Mono Audio Codec with 3.3 V Tolerant
Digital Interface
Supports 8 kHz to 48 kHz Sample Rates
Supports 16-/20-/24-Bit Word Lengths
Multibit - Modulators with
“Perfect Differential Linearity Restoration” for
Reduced Idle Tones and Noise Floor
Data Directed Scrambling DAC – Least Sensitive to Jitter
Performance (20 Hz to 20 kHz)
85 dB ADC Dynamic Range
93 dB DAC Dynamic Range
Programmable ADC Gain
On-Chip Volume Control for DAC Channel
Software Controllable Clickless Mute
Supports 256
f
, 512
f
, and 768
S
S
Clocks
Master Clock Prescaler for Use with DSP Master Clocks
On-Chip Reference
16-Lead TSSOP Package
APPLICATIONS
Digital Video Camcorders (DVC)
Portable Audio Devices (Walkman
Audio Processing
Voice Processing
Telematic Systems
General-Purpose Analog I/O
RESET
DIN
DOUT
DFS
DCLK
REFCAP
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
GENERAL DESCRIPTION
The AD74111 is a front-end processor for general-purpose audio
and voice applications. It features a multibit - A/D conversion
channel and a multibit - D/A conversion channel. The ADC
channel provides >67 dB THD+N and the DAC channel pro-
vides >88 dB THD+N, both over an audio signal bandwidth.
The AD74111 is particularly suitable for a variety of applications
where mono input and output channels are required, including
audio sections of digital video camcorders, portable personal
audio devices, and telematic applications. Its high quality
performance also makes it suitable for speech and telephony
applications such as speech recognition and synthesis, and modern
feature phones.
An on-chip reference voltage is included but can be powered
down and bypassed by an external reference source if required.
f
Master Mode
S
The AD74111 offers sampling rates that, depending on MCLK
selection and MCLK divider ratio, range from 8 kHz in the
voiceband range to 48 kHz in the audio range.
The AD74111 is available in a 16-lead TSSOP package option
and is specified for the automotive temperature range of –40°C
to +105°C.
®
, PDAs, and so on)
FUNCTIONAL BLOCK DIAGRAM
MCLK
DVDD1
DVDD2
AVDD
ADC
DIGITAL
MODULATOR
FILTER
SERIAL
DATA
PORT
DAC CHANNEL
DIGITAL
VOLUME
REFERENCE
FILTER
CONTROL
DGND
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
Low Cost, Low Power
Mono Audio Codec
AD74111
CAPP
-
GAIN
VIN
STAGE
CAPN
-
DAC
VOUT
MODULATOR
AGND
© 2003 Analog Devices, Inc. All rights reserved.
www.analog.com

AD74111YRU Summary of contents

  • Page 1

    FEATURES 2.5 V Mono Audio Codec with 3.3 V Tolerant Digital Interface Supports 8 kHz to 48 kHz Sample Rates Supports 16-/20-/24-Bit Word Lengths Multibit - Modulators with “Perfect Differential Linearity Restoration” for Reduced Idle Tones and Noise Floor Data ...

  • Page 2

    AD74111–SPECIFICATIONS Parameter ANALOG-TO-DIGITAL CONVERTERS ADC Resolution Signal to Noise Ratio (SNR) Dynamic Range ( kHz, –60 dB Input) No Filter With A-Weighted Filter Total Harmonic Distortion + Noise Programmable Input Gain Gain Step Size Offset Error Full-Scale ...

  • Page 3

    Parameter ADC DECIMATION FILTER* Pass Band Pass-Band Ripple Transition Band Stop Band Stop-Band Attenuation Group Delay Low Group Delay Mode DAC INTERPOLATION FILTER* Pass Band Pass-Band Ripple Transition Band Stop Band Stop-Band Attenuation Group Delay Low Group Delay Mode LOGIC ...

  • Page 4

    AD74111 TIMING CHARACTERISTICS Parameter MASTER CLOCK AND RESET t MCLK High MH t MCLK Low ML t RESET Low RES t DIN Setup Time RS t DIN Setup Time RH SERIAL PORT 2 t DCLK High DCLK ...

  • Page 5

    ... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Max Unit Model +105 ºC AD74111YRU +150 ºC –5– AD74111 Thermal Impedance . . . . . . . . 150.4°C/W JA ORDERING GUIDE ...

  • Page 6

    AD74111 Pin No. Mnemonic I/O Description 1 DCLK I/O Serial Clock Serial Data Input. The state of DIN on the rising edge of RESET determines the operating mode 2 DIN I of the interface. See the Selecting Master or Slave ...

  • Page 7

    FREQUENCY – NORMALIZED TO TPC 1. ADC Composite Filter Response 0 –50 –100 –150 0 0.25 0.5 FREQUENCY – NORMALIZED TO TPC 2. ADC Composite Filter Response Low Group Delay Enabled 1.0 0.5 ...

  • Page 8

    AD74111 SAMPLE RATE – kHz TPC 7. ADC THD+N vs. Sample Rate FUNCTIONAL DESCRIPTION General Description The AD74111 is a 2.5 V mono codec. It comprises an ADC and ...

  • Page 9

    ADC 8 5th ORDER MODULATOR COMB FILTER DAC 16 ZERO MODULATOR ORDER HOLD f 128 S ADC, CAPP, and CAPN Pins The ADC channel requires two external capacitors to act as charge reservoirs for the switched capacitor ...

  • Page 10

    AD74111 1.125V REFCAP EXTERNAL REFERENCE Figure 9. External Reference Master Clocking Scheme The update rate of the AD74111’s ADC and DAC channels requires an internal master clock (IMCLK) that is 256 times the sample update rate (IMCLK = 256 f ...

  • Page 11

    DFS DCLK DIN DOUT Serial Port Operating Modes The serial port of the AD74111 can be programmed to operate in a variety of modes depending on the requirements and flex- ibility of the DSP to which it is connected. The ...

  • Page 12

    AD74111 there will be a fixed relationship between the instruction cycle time of the DSP program and the AD74111 timer could be used to accurately control the DAC updates timer is not available, the Multiframe-Sync (MFS) ...

  • Page 13

    DAC DATA DIN (24 BITS) ADC DATA DOUT (24 BITS) DFS (MM16) 16 DCLKs Figure 16. 16-Bit Data Mode, Word Length = 24 Bits CONTROL DIN (16 BITS) STATUS DOUT (16 BITS) DFS 32 DCLKs Figure 17. 32-Bit Mixed Mode, ...

  • Page 14

    AD74111 DAC DATA DIN (24 BITS) ADC DATA DOUT (24 BITS) DFS Figure 20. 32-Bit Data Mode, Word Length = 24 Bits DFS C DAC DIN S ADC DOUT DFS DAC DIN ADC DOUT DFS DIN C DAC DOUT S ...

  • Page 15

    DFS DIN DAC DOUT ADC CRD:9 MFS Address (Binary ...

  • Page 16

    AD74111 R/W ADDRESS RES Reserved 15 14, 13, 12 0000 0 0 R/W ADDRESS RES 15 14, 13, 12 0001 0 R/W ADDRESS RES 15 14, 13, 12 ...

  • Page 17

    R/W ADDRESS RES 15 14, 13, 12 0100 0 R/W ADDRESS 15 14, 13, 12 0101 R REV. 0 Table X. Control Register E ADCL Peak Reserved Enable ...

  • Page 18

    AD74111 16-Lead Thin Shrink Small Outline Package [TSSOP] 0.15 0.05 OUTLINE DIMENSIONS (RU-16) Dimensions shown in millimeters 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX 0.20 0.09 8 0.30 0.65 0 0.19 ...

  • Page 19

    –19– ...

  • Page 20

    –20– ...