AD1849KP Analog Devices Inc, AD1849KP Datasheet
AD1849KP
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AD1849KP Summary of contents
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PRODUCT OVERVIEW The Serial-Port AD1849K SoundPort Stereo Codec integrates the key audio data conversion and control functions into a single integrated circuit. The AD1849K is intended to provide a com- plete, single-chip audio solution for multimedia applications requiring operation ...
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AD1849K–SPECIFICATIONS ELECTRICAL SPECIFICATIONS STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED Temperature 25 Digital Supply (V ) 5.0 DD Analog Supply (V ) 5.0 CC Clock (SCLK) 256 Master Mode 256 Bits per Frame Word Rate ( Input Signal ...
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ANALOG-TO-DIGITAL CONVERTERS Resolution ADC Dynamic Range, A-Weighted Line and Mic with 0 dB Gain (–60 dB Input, THD+N Referenced to Full Scale) Mic with 20 dB Gain (–60 dB Input, THD+N Referenced to Full Scale) ADC THD+N, (Referenced to Full ...
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AD1849K MONITOR MIX ATTENUATOR Step Size (0 –60 dB) Step Size (–61 –94.5 dB) Output Attenuation DAC ATTENUATOR Step Size (0 –60 dB) (Tested at Steps –1.5 dB, –19.5 dB, –39 dB and –60 ...
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DIGITAL TIMING PARAMETERS (Guaranteed over 4. 5. SCLK Period (t ) CLK Slave Mode Master Mode SCLK Slave Mode ...
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... V DD GNDD CIN2 ( 0.3 V COUT2 0.3 V RESET DD °C PDN 70 °C C0 +150 MINR V LINR MINL N CONNECT Temperature Model Range AD1849KP 0°C to 70°C PIN CONFIGURATION GNDD PIO1 PIO0 D/C AD1849KP SOUNDPORT N/C STEREO CODEC LOUT0R LOUT0L LOUT1L LOUT1C 17 29 LOUT1R 28 18 ORDERING GUIDE ...
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Digital Signals Pin Name PLCC SDRX 1 SDTX 44 SCLK 43 FSYNC 42 TSOUT 41 TSIN 40 D/C 35 CIN1 6 COUT1 7 CIN2 10 COUT2 11 CLKIN 4 CLKOUT 5 PDN 13 RESET 12 PIO1 37 PIO0 36 Analog ...
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AD1849K FUNCTIONAL DESCRIPTION This section overviews the functionality of the AD1849K and is intended as a general introduction to the capabilities of the device. As much as possible, detailed reference information has been placed in “Control Registers” and other sections. ...
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On input, 8-bit companded data is expanded to an internal linear representation, according to whether µ-law or A-law was specified in the Codec’s internal registers. Note that when µ-law compressed data is expanded to a linear format, it requires 14 ...
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AD1849K The loopback modes are shown graphically in Figure 3. LINE, MIC GAIN A/D INPUT DISCONNECTED AD1849K MONITOR DISABLE MUTE LINE 0, 0 OUTPUT D/A LINE 1 1 FUNCTIONAL LINE, MIC GAIN A/D INPUT AD1849K MONITOR LINE 0, LINE 1 ...
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CONTROL REGISTERS The AD1849K SoundPort Stereo Codec accepts control information through its serial port when in Control Mode. Some control information is also embedded in the data stream when in Data Mode. (See Figure 8.) Control bits can also be ...
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AD1849K Control Byte 2, Data Format Register Data 7 Data DFR2:0 Data conversion frequency (F DFR Divide Factor 0 3072 1 1536 2 896 3 768 4 448 5 384 6 512 7 2560 Note ...
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Control Byte 4, Test Register Data 7 Data ENL Enable loopback testing: 0 Disabled 1 Enabled ADL Loopback mode: 0 Digital loopback from Data/Control receive to Data/Control transmit (D-D) 1 Analog loopback from DACs to ...
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AD1849K Data Mode Data and Control Registers Data Byte 1, Left Audio Data—Most Significant 8 Bits Data 7 Data 6 L15 L14 16-bit linear PCM mode, this byte contains the upper eight bits of the left audio ...
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Data Byte 6, Output Setting Register 2 Data 7 Data 6 ADI ADI ADC Invalid. This bit is set to “1” during the autocalibration sequence, indicating that the serial data output from the ADCs is meaningless. SM ...
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AD1849K Control Register Defaults Upon coming out of RESET or Power Down, internal control registers will be initialized to the following values: Defaults Calming Out of RESET or Power Down MB 0 Mic Input Applied Fixed Gain ...
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SERIAL INTERFACE A single serial interface on the AD1849K provides for the trans- fer of both data and control information. This interface is simi- lar to AT&T’s Concentrated Highway Interface (CHI), allowing simple connection with ISDN and other telecommunication devices. ...
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AD1849K TSIN is sampled on the falling edge of SCLK. A LO-to-HI transition of TSIN defines the beginning of the word to occur at the next rising edge of SCLK (for driving output data). The LO-to-HI transition is defined by ...
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Daisy-Chaining Multiple Codecs Up to four SoundPort Codecs can be daisy-chained with frame sizes in multiples of 64 bits. The serial data is time-division multiplexed (TDM), allocating each Codec its own 64-bit word in the frame. The pins that support ...
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AD1849K RESET should be asserted when power is first applied to the AD1849K. RESET should be asserted for a minimum power-up or when leaving the power-down mode to allow the power supplies and the voltage reference ...
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DCB = “0” until the echoed DCB from the Codec also is reset to “0” (i.e., it must poll DCB until a “0” is read). This is the first interlock of the DCB handshake. The DCB = “0” is echoed ...
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AD1849K A circuit for 2 V rms line-level inputs is shown in Figure 11. Note that this is approximately a divide-by-two resistive divider. 0.33 F 5.1k 5.1k 560pF NPO 0.33 F 5.1k 5.1k 560pF NPO An external passive antialias filter ...
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No external circuitry is required for driving a single speaker from the AD1849K’s mono outputs as shown in Figure 16. Note that this output is differential. Analog Devices guarantees specified distortion performance for speaker impedances of 48 Ω or greater. ...
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AD1849K 5V FERRITE SUPPLY 0 0 0.33 F 5.1k LINL 560pF 5.1k NPO LINE IN MOUT 0.33 F 5.1k LINR MOUTR 560pF 5.1k LOUT0L NPO AD1849K PREFERRED MINL LOUT0R MICROPHONE ...
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CS4215 COMPATIBILITY The Analog Devices AD1849K SoundPort Stereo Codec is pin- compatible with the CS4215. These chips were independently codeveloped to a common specification provided by Sun Microsystems, Inc. Because of their independent development, they will differ in performance and ...
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AD1849K FREQUENCY RESPONSE PLOTS 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 0.0 0.1 0.2 0.3 0.4 0.5 0.6 SAMPLE FREQUENCY – –10 –20 –30 –40 –50 –60 –70 –80 –90 ...
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INDEX PRODUCT OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SPECIFICATIONS . . . . . . . . . ...
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AD1849K 0.048 (1.21) 0.042 (1.07) 0.048 (1.21) 6 0.042 (1.07 0.020 (0.50) R OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 44-Lead Plastic Leaded Chip Carrier (PLCC) (P–44A) 0.180 (4.57) 0.165 (4.19) 0.056 (1.42) 0.025 (0.63) 0.042 ...