AD74111YRU-REEL7 Analog Devices Inc, AD74111YRU-REEL7 Datasheet
AD74111YRU-REEL7
Specifications of AD74111YRU-REEL7
Related parts for AD74111YRU-REEL7
AD74111YRU-REEL7 Summary of contents
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FEATURES 2.5 V Mono Audio Codec with 3.3 V Tolerant Digital Interface Supports 8 kHz to 48 kHz Sample Rates Supports 16-/20-/24-Bit Word Lengths Multibit - Modulators with “Perfect Differential Linearity Restoration” for Reduced Idle Tones and Noise Floor Data ...
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AD74111–SPECIFICATIONS Parameter ANALOG-TO-DIGITAL CONVERTERS ADC Resolution Signal to Noise Ratio (SNR) Dynamic Range ( kHz, –60 dB Input) No Filter With A-Weighted Filter Total Harmonic Distortion + Noise Programmable Input Gain Gain Step Size Offset Error Full-Scale ...
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Parameter ADC DECIMATION FILTER* Pass Band Pass-Band Ripple Transition Band Stop Band Stop-Band Attenuation Group Delay Low Group Delay Mode DAC INTERPOLATION FILTER* Pass Band Pass-Band Ripple Transition Band Stop Band Stop-Band Attenuation Group Delay Low Group Delay Mode LOGIC ...
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AD74111 TIMING CHARACTERISTICS Parameter MASTER CLOCK AND RESET t MCLK High MH t MCLK Low ML t RESET Low RES t DIN Setup Time RS t DIN Setup Time RH SERIAL PORT 2 t DCLK High DCLK ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Max Unit Model +105 ºC AD74111YRU +150 ºC –5– AD74111 Thermal Impedance . . . . . . . . 150.4°C/W JA ORDERING GUIDE ...
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AD74111 Pin No. Mnemonic I/O Description 1 DCLK I/O Serial Clock Serial Data Input. The state of DIN on the rising edge of RESET determines the operating mode 2 DIN I of the interface. See the Selecting Master or Slave ...
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FREQUENCY – NORMALIZED TO TPC 1. ADC Composite Filter Response 0 –50 –100 –150 0 0.25 0.5 FREQUENCY – NORMALIZED TO TPC 2. ADC Composite Filter Response Low Group Delay Enabled 1.0 0.5 ...
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AD74111 SAMPLE RATE – kHz TPC 7. ADC THD+N vs. Sample Rate FUNCTIONAL DESCRIPTION General Description The AD74111 is a 2.5 V mono codec. It comprises an ADC and ...
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ADC 8 5th ORDER MODULATOR COMB FILTER DAC 16 ZERO MODULATOR ORDER HOLD f 128 S ADC, CAPP, and CAPN Pins The ADC channel requires two external capacitors to act as charge reservoirs for the switched capacitor ...
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AD74111 1.125V REFCAP EXTERNAL REFERENCE Figure 9. External Reference Master Clocking Scheme The update rate of the AD74111’s ADC and DAC channels requires an internal master clock (IMCLK) that is 256 times the sample update rate (IMCLK = 256 f ...
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DFS DCLK DIN DOUT Serial Port Operating Modes The serial port of the AD74111 can be programmed to operate in a variety of modes depending on the requirements and flex- ibility of the DSP to which it is connected. The ...
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AD74111 there will be a fixed relationship between the instruction cycle time of the DSP program and the AD74111 timer could be used to accurately control the DAC updates timer is not available, the Multiframe-Sync (MFS) ...
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DAC DATA DIN (24 BITS) ADC DATA DOUT (24 BITS) DFS (MM16) 16 DCLKs Figure 16. 16-Bit Data Mode, Word Length = 24 Bits CONTROL DIN (16 BITS) STATUS DOUT (16 BITS) DFS 32 DCLKs Figure 17. 32-Bit Mixed Mode, ...
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AD74111 DAC DATA DIN (24 BITS) ADC DATA DOUT (24 BITS) DFS Figure 20. 32-Bit Data Mode, Word Length = 24 Bits DFS C DAC DIN S ADC DOUT DFS DAC DIN ADC DOUT DFS DIN C DAC DOUT S ...
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DFS DIN DAC DOUT ADC CRD:9 MFS Address (Binary ...
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AD74111 R/W ADDRESS RES Reserved 15 14, 13, 12 0000 0 0 R/W ADDRESS RES 15 14, 13, 12 0001 0 R/W ADDRESS RES 15 14, 13, 12 ...
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R/W ADDRESS RES 15 14, 13, 12 0100 0 R/W ADDRESS 15 14, 13, 12 0101 R REV. 0 Table X. Control Register E ADCL Peak Reserved Enable ...
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AD74111 16-Lead Thin Shrink Small Outline Package [TSSOP] 0.15 0.05 OUTLINE DIMENSIONS (RU-16) Dimensions shown in millimeters 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX 0.20 0.09 8 0.30 0.65 0 0.19 ...
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