AD1849KPZ Analog Devices Inc, AD1849KPZ Datasheet - Page 23

• Manufacturer Part Number: AD1849KPZ
• Description: IC CODEC STEREO 5V 16BIT 44PLCC
• Manufacturer: Analog Devices Inc
• Type: Stereo Audior

Specifications of AD1849KPZ

• Data Interface: Serial
• Resolution (bits): 16 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 83 / 86
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

No external circuitry is required for driving a single speaker
from the AD1849K’s mono outputs as shown in Figure 16.
Note that this output is differential. Analog Devices guarantees
specified distortion performance for speaker impedances of 48 Ω
or greater. Lower impedance speakers can be used, but at the
cost of some distortion. When driving speakers much less than
48 Ω, a power amp should be used. The AD1849K can drive
speakers of 32 Ω or greater.
Figure 17 illustrates reference bypassing. V
connected to its bypass capacitors, which should be located as
close to Pin 21 as possible (especially the 0.1 µF capacitor).
Figure 18 illustrates signal-path filtering capacitors, C0 and C1.
The AD1849K must use 1.0 µF capacitors.
V
REF
MOUTR
MOUT
10 F
1 F
C0
0.1 F
CMOUT
1 F
C1
REF
should only be
Z 32
10 F
The crystals shown in the crystal connection circuitry of Figure 19
should be fundamental-mode and parallel-tuned. Two sources for
the exact crystals specified are Component Marketing Services
in Massachusetts, U.S. at 617-762-4339 and Cardinal Compo-
nents in New Jersey, U.S. at 201-746-0333. Note that using the
exact data sheet frequencies is not required and that external
clock sources can be used to overdrive the AD1849K’s internal
oscillators. (See the description of the MCK1:0 control bits above.)
If using an external clock source, apply it to the crystal input pins
while leaving the crystal output pins unconnected. Attention
should be paid to providing low jitter external input clocks.
Good, standard engineering practices should be applied for
power-supply decoupling. Decoupling capacitors should be
placed as close as possible to package pins. If a separate analog
power supply is not available, we recommend the circuit shown
in Figure 20 for using a single 5 V supply. Ferrite beads suffice
for the inductors shown. This circuitry should be as close to the
supply pins as is practical.
The two PIO pins must be pulled HI, as they have open drain
outputs. Analog Devices also recommends pull-down resistors
for SCLK, FSYNC, SDTX, SDRX, and TSIN to provide
margin against system noise. CLKIN, CIN1, and CIN2, if not
used, should be grounded. A typical connection diagram is
shown in Figure 21, which serves to summarize the preceding
application circuits.
20–64pF
5V SUPPLY
CIN1
24.576MHz
0.1 F
FERRITE
0.1 F
FERRITE
COUT1
20–64pF
1 F
1 F
1.6
V
DD
20–64pF
0.1 F
1 F
CIN2
V
DD
16.9344MHz
0.1 F
AD1849K
0.1 F
V
CC
COUT2
V
DD
20–64pF
V
CC
0.1 F