UDA1384H/N1,557 NXP Semiconductors, UDA1384H/N1,557 Datasheet

IC AUDIO CODEC 44-QFP

UDA1384H/N1,557

Manufacturer Part Number
UDA1384H/N1,557
Description
IC AUDIO CODEC 44-QFP
Manufacturer
NXP Semiconductors
Type
Audio Codecr
Datasheet

Specifications of UDA1384H/N1,557

Data Interface
I²C, Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
5 / 6
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
98 / 110 (Differential), 98 / 110 (Single-Ended)
Voltage - Supply, Analog
2.7 V ~ 3.6 V
Voltage - Supply, Digital
2.7 V ~ 3.6 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3450
935274756557
UDA1384H

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UDA1384H/N1,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
1. General description
2. Features
2.1 General
The UDA1384 is a single-chip consisting of 4 plus 1 Analog-to-Digital Converters (ADC)
and 6 Digital-to-Analog Converters (DAC) with signal processing features employing
bitstream conversion techniques. The multichannel configuration makes the device
eminently suitable for use in digital audio equipment which incorporates surround feature.
The UDA1384 supports conventional 2 channels per line data transfer conformable to the
I
lengths of up to 24 bits and the LSB-justified format with word lengths of 16 bits, 20 bits
and 24 bits, as well as 4 channels to 6 channels per line transfer mode. The device also
supports a combination of the MSB-justified output format and the LSB-justified input
format. The UDA1384 has special sound processing features in the Direct Stream Digital
(DSD) playback mode, de-emphasis, volume and mute which can be controlled via the
L3-bus or I
2
S-bus format with word lengths of up to 24 bits, the MSB-justified format with word
UDA1384
Multichannel audio coder-decoder
Rev. 02 — 17 January 2005
2.7 V to 3.6 V power supply
5 V tolerant digital inputs
24-bit data path
Selectable control: via L3-bus or I
Supports sample frequency ranges for:
Separate power control for ADC and DAC
ADC plus integrated high-pass filter to cancel DC offset
Integrated digital filter plus DAC
Slave mode only applications
Easy application
Audio ADC: f
Voice ADC: f
Audio DAC: f
2
C-bus interface.
s
s
s
= 7 kHz to 50 kHz
= 16 kHz to 200 kHz
= 16 kHz to 100 kHz
2
C-bus microcontroller interface
Product data sheet

Related parts for UDA1384H/N1,557

UDA1384H/N1,557 Summary of contents

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UDA1384 Multichannel audio coder-decoder Rev. 02 — 17 January 2005 1. General description The UDA1384 is a single-chip consisting of 4 plus 1 Analog-to-Digital Converters (ADC) and 6 Digital-to-Analog Converters (DAC) with signal processing features employing bitstream conversion techniques. The ...

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Philips Semiconductors 2.2 Multiple format data interface Audio interface supports standard I multichannel formats Voice interface supports I 2.3 Digital sound processing Control via L3-bus or I Channel independent digital logarithmic volume Digital de-emphasis for f Soft or quick mute ...

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Philips Semiconductors Table DDD (pins V SS Symbol I DDD(pd) T amb Audio analog-to-digital converter D 0 (THD+N)/S S/N cs Digital-to-analog converter Differential mode V o(rms) (THD+N)/S S/N cs Single-ended mode V o(rms) (THD+N)/S S/N cs ...

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Philips Semiconductors 6. Block diagram VINL1 VINL2 VVOICE DATAV BCKV WSV MCCLK MCMODE MCDATA I2C_L3 VOUT1N VOUT1P VOUT3N VOUT3P VOUT5N VOUT5P Fig 1. Block diagram 9397 750 14366 Product data sheet V DDA(AD PGA ADC 1L 6 ADC ...

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Philips Semiconductors 7. Pinning information 7.1 Pinning Fig 2. Pin configuration 7.2 Pin description Table 3: Symbol V ref VINL1 V SSA(AD) VINR1 V DDA(AD) VINL2 V ADCN VINR2 V ADCP VVOICE TEST DATAAD2 DATAAD1 BCKAD WSAD 9397 750 14366 ...

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Philips Semiconductors Table 3: Symbol DATAV BCKV WSV SYSCLK MCMODE MCCLK MCDATA WSDA BCKDA DATADA1 DATADA2 DATADA3 V SSD V DDD I2C_L3 VOUT1P VOUT1N VOUT2P VOUT2N VOUT3P VOUT3N V DDA(DA) VOUT4P VOUT4N V SSA(DA) VOUT5P VOUT5N VOUT6P VOUT6N [1] See ...

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Philips Semiconductors Table 4: Type DIS DO DS IIC 8. Functional description 8.1 System clock The UDA1384 operates in slave mode only; this means that in all applications the system must provide either the system clock (the bit clock for ...

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Philips Semiconductors 8.2 Audio analog-to-digital converter (audio ADC) The audio analog-to-digital front-end of the UDA1384 consists of 4-channel single-ended ADCs with programmable gain stage (from with 3 dB steps), controlled via the microcontroller interface. Using ...

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Philips Semiconductors Table 8: Item Pass-band ripple Pass-band droop Stop band Dynamic range 8.6 Interpolation filter of DAC The digital interpolation filter interpolates from 1f sampling mode) by cascading FIR filters, and has two sets of filter coefficients for sharp ...

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Philips Semiconductors MIX [ 1:0 ] from ADC ch1 ch2 ch3 ch4 2 from I S-bus DATADA1 DATADA2 DATADA3 DIS [ 1:0 ] ICS [ 1:0 ] Fig 4. Block diagram of DAC mixer 8.9 Audio digital-to-analog converters The audio ...

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Philips Semiconductors V DDA(AD ref Fig 5. Power-on reset circuit 8.11 Audio digital interface The following audio formats can be selected via the microcontroller interface: • S-bus format with data ...

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LEFT BCK DATA MSB S-BUS FORMAT WS LEFT BCK DATA MSB B2 LSB MSB-JUSTIFIED FORMAT WS LEFT BCK DATA WS LEFT 20 19 BCK DATA MSB B2 WS ...

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BCK DATA MSB LSB MSB CH1 CH3 BCK DATA MSB LSB MSB CH1 CH3 BCK DATA MSB LSB MSB CH1 (1) Format 1. (2) ...

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Philips Semiconductors 8.12 Voice digital interface The following voice formats can be selected via the microcontroller interface: • S-bus format with data word length bits. The left and the right channels contain the same ...

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Philips Semiconductors 8.14 Microcontroller interface mode The microcontroller interface mode can be selected as shown in • L3-bus mode when pin I2C_L3 = LOW • C-bus mode when pin I2C_L3 = HIGH Table 11: Pin MCCLK MCDATA MCMODE ...

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Philips Semiconductors The data transfer mode is characterized by signal L3MODE = HIGH and is used to transfer one or more bytes representing a register address, instruction or data. Basically, two types of data transfers can be defined: • Write ...

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L3CLOCK L3MODE device address L3DATA 0 1 DOM bits Fig 11. Data write mode L3CLOCK L3MODE device address register address L3DATA DOM bits read prepare read Fig 12. Data read mode register address data byte 1 0 ...

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Philips Semiconductors 9.4 Data write mode The data write mode is explained in the signal diagram of device, 4 bytes must be sent (see 1. Byte 1 starting with ‘01’ for signalling the write action to the device, followed by ...

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Philips Semiconductors Table 15: Byte 10. I C-bus interface 10.1 General The UDA1384 has an I with the I accessible via pin MCMODE with signal QMUTE. The exchange of data and control information ...

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Philips Semiconductors Fig 13. Bit transfer on the I 10.4 Byte transfer Each byte (8 bits) is transferred with the MSB first (see Table 16: Bit number MSB 7 10.5 Data transfer A device generating a message is a transmitter; ...

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Philips Semiconductors A slave receiver which is addressed, must generate an acknowledge after the reception of each byte. Also a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. ...

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Philips Semiconductors The write cycle is used to write groups of two bytes to the internal registers for the settings also possible to read the registers for the device status information. 10.11 Write cycle 2 The I C-bus ...

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Philips Semiconductors 7. Then the microcontroller generates the device address ‘0011 000’ again, but this time followed by a logic 1 (read) of the R/W bit. An acknowledge is followed from the UDA1384. 8. The UDA1384 sends 2 bytes data ...

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Philips Semiconductors Table 20: Address 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh ADC input amplifier gain settings 20h 21h Supplemental settings 30h 31h 9397 750 14366 Product data sheet Overview of register mapping …continued Function DAC channel 5 DAC ...

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Register mapping [1] Table 21: UDA1384 register mapping Add Function D15 D14 D13 System settings [2] 00h system RST VFS1 VFS0 - 0 0 01h audio ADC and DAC DC PAB PAA subsystem 02h voice ADC ...

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Table 21: UDA1384 register mapping …continued Add Function D15 D14 D13 19h DAC mixing - - - channel 1Ah DAC mixing ICS1 ICS0 - channel 1Bh DAC mixing - - - ...

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Philips Semiconductors 11.3 System settings Table 22: Bit Symbol Reset Access Bit Symbol Reset Access Table 23: Bit 9397 750 14366 Product ...

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Philips Semiconductors Table 23: Bit 1 0 Table 24: VFS1 Table 25: SC1 Table 26: OP1 Table 27: FS1 9397 750 14366 Product data ...

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Philips Semiconductors 11.4 Audio ADC and DAC subsystem settings Table 28: Bit Symbol Reset Access Bit Symbol Reset Access Table 29: Bit 9397 ...

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Philips Semiconductors Table 30: AIF2 DIF2 Table 31: DIS1 11.5 Voice ADC system settings Table 32: Bit Symbol Reset Access Bit Symbol Reset Access Table 33: Bit 15 ...

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Philips Semiconductors Table 33: Bit Table 34: BCK1 Table 35: VH1 9397 750 14366 Product data sheet Description of the voice ADC system register bits Symbol Description PVA Polarity ...

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Philips Semiconductors 11.6 Status output register Table 36: Bit Symbol Reset Access Bit Symbol Reset Access Table 37: Bit 9397 750 14366 Product data sheet Status output register (address 0Fh) bit ...

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Philips Semiconductors 11.7 DAC channel selection Table 38: Bit Symbol Reset Access Bit Symbol Reset Access Table 39: Bit and Table 40: MIX1 Table 41: ...

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Philips Semiconductors Table 42: SEL1 11.8 DAC features settings Table 43: Bit Symbol Reset Access Bit Symbol Reset Access Table 44: Bit 9397 750 ...

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Philips Semiconductors Table 45: ICS1 Table 46: DE2 Table 47: VC7 ...

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Philips Semiconductors 11.9 DAC channel 1 to channel 6 settings All the DAC features which are written in register 11h are copied into the odd channel registers. Table 48: Bit Symbol Reset Access Bit Symbol Reset Access All the DAC ...

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Philips Semiconductors All the DAC features which are written in register 11h are copied into the even channel registers, except the bits ICS[1:0] and DE[2:0]. Table 51: Bit Symbol Reset Access Bit Symbol Reset Access 11.11 Audio ADC 1 and ...

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Philips Semiconductors Table 54: IA3 IB3 11.12 Voice ADC gain settings Table 55: Bit Symbol Reset Access Bit Symbol Reset Access Table 56: Bit Table 57: IV4 0 ...

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Philips Semiconductors 11.13 Supplemental settings 1 Table 58: Bit Symbol Reset Access Bit Symbol Reset Access Table 59: Bit 11.14 Supplemental settings 2 Table 60: Bit Symbol Reset Access Bit Symbol Reset Access ...

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Philips Semiconductors Table 61: Bit 0 Table 62: DITH2 12. Limiting values Table 63: In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol xtal(max) T stg T ...

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Philips Semiconductors 14. Static characteristics Table 65: Characteristics 3 DDD DDA(AD) DDA(DA) specified. Symbol Parameter Supplies V ADC analog supply DDA(AD) voltage V DAC analog supply DDA(DA) voltage V digital supply voltage ...

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Philips Semiconductors Table 65: Characteristics …continued 3 DDD DDA(AD) DDA(DA) specified. Symbol Parameter R input resistance of i(VADC) voice ADC Digital-to-analog converter R load resistance L R output resistance o [1] All ...

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Philips Semiconductors Table 66: Characteristics …continued 3 DDD DDA(AD) DDA(DA) referenced to ground (pins V ); unless otherwise specified. SS Symbol Parameter (THD + N)/S total harmonic distortion-plus-noise to signal ratio S/N ...

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Philips Semiconductors Table 66: Characteristics …continued 3 DDD DDA(AD) DDA(DA) referenced to ground (pins V ); unless otherwise specified. SS Symbol Parameter Single-ended mode V output voltage (RMS value) o(rms) V output ...

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Philips Semiconductors Table 67: Timing …continued 2 3 DDD DDA(AD) DDA(AD kHz; unless otherwise specified. s Symbol Parameter t data output to bit clock delay d(DATAO-BCK) t ...

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Philips Semiconductors Table 67: Timing …continued 2 3 DDD DDA(AD) DDA(AD kHz; unless otherwise specified. s Symbol Parameter t L3DATA disable time for read dis(L3)R data 2 ...

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Philips Semiconductors WS t BCKH t r BCK T cy(BCK) DATAO DATAI 2 Fig 17. I S-bus serial interface timing L3MODE L3CLOCK L3DATA Fig 18. L3-bus address mode timing 9397 750 14366 Product data sheet t t h(WS ...

Page 48

Philips Semiconductors L3MODE t su(L3)D L3CLOCK L3DATA write L3DATA read t en(L3)R Fig 19. L3-bus data transfer (write and read) mode timing SDA LOW r SCL t HD;STA t HD;DAT S 2 Fig 20. I C-bus ...

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Philips Semiconductors 17. Package outline QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 1. pin 1 index DIMENSIONS (mm are the original dimensions) A ...

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Philips Semiconductors 18. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe desirable to take normal precautions appropriate to handling integrated circuits. 19. Soldering 19.1 Introduction to soldering surface ...

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Philips Semiconductors • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): – larger than or equal to ...

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Philips Semiconductors [2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may ...

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Philips Semiconductors 20. Revision history Table 69: Revision history Document ID Release date UDA1384_2 20050117 • Modifications: The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors • Section ...

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Philips Semiconductors 21. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...

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Philips Semiconductors 25. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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