CY8C20180-SX2I Cypress Semiconductor Corp, CY8C20180-SX2I Datasheet
CY8C20180-SX2I
Specifications of CY8C20180-SX2I
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CY8C20180-SX2I Summary of contents
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... The I is fully configurable without any external hardware strapping. • 198 Champion Court • San Jose CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 ® ™ Express Button Capacitive Controllers ...
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... Recommended via Hole Placement .......................... 18 Example PCB Layout Design with Two CapSense Buttons and Two LEDs ........................................................... 20 Operating Voltages ......................................................... 21 CapSense Constraints ................................................... 21 Electrical Specifications ................................................ 22 Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Absolute Maximum Ratings ....................................... 22 Operating Temperature ............................................. 22 DC Electrical Characteristics ........................................ 23 DC Chip Level Specifications .................................... 23 DC GPIO Specifications ............................................ 23 DC POR and LVD Specifications ...
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... Configurable as CapSense or GPIO Notes 1. CY8C20110 (10 Buttons) / CY8C20180 (8 Buttons) / CY8C20160 (6 Buttons) / CY8C20140 (4 Buttons) 2. 8/6/4 available configurable IOs can be configured to any of the 10 IOs of the package. After any of the 8/6/4 IOs are chosen, the remaining 2/4/6 IOs of the package are not available for any functionality. ...
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... Supply voltage DD Notes 4. CY8C20110 (10 Buttons) / CY8C20180 (8 Buttons) / CY8C20160 (6 Buttons) / CY8C20140 (4 Buttons) 5. 8/6/4 available configurable IOs can be configured to any of the 10 IOs of the package. After any of the 8/6/4 IOs are chosen, the remaining 2/4/6 IOs of the package are not available for any functionality. ...
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... Avoid using GP1[0] and GP1[1] for driving LED. These two pins have special functions during power up which is used at factory. LEDs connected to these two pins will blink during power up of the device. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Description CY8C20142 ...
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... GPO[2] 560E R7 LED 2 GPO[1] X RES CY8C20110 3 I2C_SCL GP1[4] 4 I2C_SDA GP1[3] R12 R13 R14 560E 560E 560E D5 LED VDD_CE B1 B0 Capsense sensor CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 2 C Interface VDD_CE C2 0.1uF Capsense 12 R6 560E B4 sensor 11 VDD_CE 10 R9 560E D3 LED 9 R11 560E D4 LED ...
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... The I C signals should not be driven high by the master in this situation port pin or group of port pins of the master can cater to the power supply requirements of the circuit, the LDO can be avoided. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 2 C Signaling ...
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... CapSense Express. If the master fails and 2 C bus after the continues to communicate, the communication is erroneous. The following diagrams represent the ACK time delays shown in “Format for Register Write and Read” read. CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 2 C addresses. 8-bit Slave Address 02 ...
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... Time to process the received data. 9. Time taken for the device to send next byte. Document Number: 001-54606 Rev. *E Figure 8. Write ACK Time Representation Figure 9. Read ACK Time Representation A Data A Data A A Stop A Data Data CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 [8] [ Data A Stop N Stop Page [+] Feedback ...
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... Hz) ■ 125 ms (8 Hz) ■ Hz) Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Deep Sleep Mode Deep sleep mode provides the lowest power consumption because there is no operation running. All CapSense scanning is disabled during this mode. In this mode, the device wakes up only using an external GPIO interrupt ...
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... LED Dimming Mode 1: Change Intensity on ON/OFF Button Status LED Dimming Mode 2: Flash Intensity on ON Button Status Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Page [+] Feedback ...
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... LED Dimming Mode 3: Hold Intensity After ON/OFF Button Transition LED Dimming Mode 4: Toggle Intensity on ON/OFF or OFF/ON Button Transitions Note LED DIMMING is available only in CY8C20110. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Page [+] Feedback ...
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... RW – – – – – – – – 00 CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 I2C Max ACK Time I2C Max ACK in Normal Mode Time in Setup (ms) Mode (ms) 0.1 – 0.1 – 0.1 – 0.1 – 0.1 – 0.1 – – 11 – 11 – ...
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... RW – – – – – – – YES A0 RW YES 00 RW – 0A CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 I2C Max ACK Time I2C Max ACK in Normal Mode Time in Setup (ms) Mode (ms) 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 ...
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... RW – – – – – – – 42/40/60/80/10 R – – 00 Table 5. CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 I2C Max ACK Time I2C Max ACK in Normal Mode Time in Setup (ms) Mode (ms) 0.11 11 0.11 11 0.11 11 0.11 11 – 11 – 11 – 11 – 11 – 11 – 11 – 11 – ...
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... RW – – – – – – – – – – CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 I2C Max ACK Time I2C Max ACK in Normal Mode Time in Setup (ms) Mode (ms) 0.1 11 0.1 11 0.1 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.12 11 0.1 11 Page ...
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... Register has both read and write access R Register has only read access Note 19. The ‘W’ indicates the write transfer. The next byte of data represents the 7-bit I2C address. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Executable Duration the Device is not Mode accessible after ACK (in ms) ...
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... Button ground clearance = Overlay thickness [Y] – – Hatched ground 7-mil trace and 45-mil grid (15% filling) – – Hatched ground 7-mil trace and 70-mil grid (10% filling) – 200 mm < 100 mm 0.17 mm 0.20 mm 0.17 mm (7-mil) CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Recommendations/Remarks Page [+] Feedback ...
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... Cut a hole in the sensor pad and use rear mountable LEDs. Refer the PCB layout below. – – Standard board thickness for CapSense FR4 based designs is 1.6 mm. CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Page [+] Feedback ...
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... Example PCB Layout Design with Two CapSense Buttons and Two LEDs Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Figure 10. Top Layer Figure 11. Bottom Layer CY8C20142 Page [+] Feedback ...
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... Document Number: 001-54606 Rev page 13 and “CapSense Express Commands” Min Typ Max Units – – All layout best practices followed, properly tuned, and noise free condition. – – ± 5% – CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 2 on page 17 ACK Notes Page [+] Feedback ...
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... – 0.5 – 0 – 0.5 – 0 –25 – +50 mA 2000 – – V Human body model ESD – – 200 mA Min Typ Max Unit –40 – +85 °C –40 – +100 °C CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Notes Notes Page [+] Feedback ...
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... Input high voltage IH V Input hysteresis voltage H I Input leakage IL C Capacitive load on pins as input IN C Capacitive load on pins as output OUT Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Min Typ Max Unit 2.40 – 5.25 V – 1.5 2.5 mA Conditions are V – ...
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... The maximum sink current for 20140 and 20142 devices and for all other devices the maximum sink current 21. The maximum sink current per port for 20140 and 20142 devices and for all other devices the maximum sink current is 30 mA. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Min ...
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... V. >3.10 The device automatically reconfigures itself to work in 3.3 V mode of operation. <2.4 V The device goes into reset. <4.73 V The scanning for CapSense parameters shuts down until the voltage returns to over 4.73 V. CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Max Units Notes – – ...
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... Rise0 Cload = 50 pF, Port 0 t Rise time, strong mode, Rise1 Cload = 50 pF, Port 1 t Fall time, strong mode, Fall Cload = 50 pF Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Min Typ Max Units kHz Calculations during sleep operations are done based on ILO frequency. ...
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... T SUSTAI2C T HDDATI2C Sr Repeated START Condition CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Notes Fast mode not supported for V < 3 Bus T SPI2C T BUFI2C T SUSTOI2C P S STOP Condition Page [+] Feedback ...
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... Set the read point to 82h R 00 RD. RD. RD. Consecutive 6 reads get baseline, difference count and raw count (all two byte each Set the read pointer Reading a byte gets status CapSense inputs CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Comment on page 17. on page 17. Page [+] Feedback ...
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... Table 14.Key Features and Ordering Information Package Ordering Code Diagram CY8C20110-LDX2I 001-09116 16 QFN CY8C20110-SX2I 51-85068 16 SOIC CY8C20180-LDX2I 001-09116 16 QFN CY8C20180-SX2I 51-85068 CY8C20160-LDX2I 001-09116 16 QFN CY8C20160-SX2I 51-85068 CY8C20140-LDX2I 001-09116 16 QFN CY8C20140-SX2I 51-85068 CY8C20142-SX1I 51-85066 Note For die sales information, contact a local Cypress sales office or Field Applications Engineer (FAE). ...
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... Package Diagrams Document Number: 001-54606 Rev. *E Figure 13. 16-pin QFN 3 × (Sawn) Figure 14. 16-pin (150--mil) SOIC CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 001-09116 *E 51-85068 *C Page [+] Feedback ...
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... Document Number: 001-54606 Rev. *E Figure 15. 8-pin (150--mil) SOIC CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 51-85066 *D Page [+] Feedback ...
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... Hexadecimal numbers may also be represented by a ‘0x’ prefix, the C coding convention. Binary numbers have an appended lowercase ‘b’ (for example, 01010100b’ or ‘01000011b’). Numbers not indicated by an ‘h’ or ‘b’ are decimals. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 Acronym ...
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... The device that generates a periodic signal with a fixed frequency and duty cycle. A clock is sometimes used to synchronize different logic blocks. comparator An electronic circuit that produces an output voltage or current whenever two input levels simultaneously satisfy predetermined amplitude requirements. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Page [+] Feedback ...
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... I2C uses only two bi-directional pins, clock and data, both running at +5V and pulled high with resistors. The bus operates at 100 kbits/second in standard mode and 400 kbits/second in fast mode. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Page ...
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... PCB design (both being computer generated files) and may also involve pin names. Document Number: 001-54606 Rev. *E and provides an interrupt to the system when V DD CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 falls lower than a selected threshold. DD ...
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... A signal whose data is not acknowledged or acted upon until the next active edge of a clock signal system whose operation is synchronized by a clock signal. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 ® registered trademark and Programmable System-on- CY8C20142 ...
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... A name for a power net meaning "voltage source." The most negative power supply signal. SS watchdog timer A timer that must be serviced periodically not serviced, the CPU resets after a specified period of time. Document Number: 001-54606 Rev. *E CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 Page [+] Feedback ...
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... Document History Page Document Title: CY8C20110, CY8C20180, CY8C20160, CY8C20140, CY8C20142 CapSense Button Capacitive Controllers Document Number: 001-54606 Orig. of Revision ECN Change ** 2741726 SLAN/FSU *A 2821828 SSHH/FSU *B 2892629 NJF *C 3002214 SLAN *D 3042142 ARVM *E 3085081 NJF Document Number: 001-54606 Rev. *E Submission Description of Change Date ...
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... Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 001-54606 Rev. *E All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised November 19, 2010 CY8C20110, CY8C20180 CY8C20160, CY8C20140 CY8C20142 PSoC Solutions psoc.cypress.com/solutions ...