USB2507-ADT SMSC, USB2507-ADT Datasheet - Page 13

IC HUB 7PORT USB COMPATBL 80TQFP

USB2507-ADT

Manufacturer Part Number
USB2507-ADT
Description
IC HUB 7PORT USB COMPATBL 80TQFP
Manufacturer
SMSC
Type
Integrated USB Compatible 3 Port Hubr
Datasheet

Specifications of USB2507-ADT

Controller Type
USB Hub
Interface
I²C
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
100mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
80-TQFP, 80-VQFP
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage Range
1.62V To 1.98V, 3V To 3.6V
Digital Ic Case Style
TQFP
No. Of Pins
80
Operating Temperature Range
0°C To +70°C
Data Rate Max
480Mbps
Rohs Compliant
Yes
For Use With
EVB-2507 - BOARD EVALUATION FOR USB2507
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1032

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Integrated USB 2.0 Compatible 7-Port Hub
Datasheet
SMSC USB2507
VDDCORE3P3
VDDAPLL3P3
VDDAPLL1P8
Internal 1.8V
Analog Test
VDDIO3P3
VDDA3P3
BUFFER
regulator
VDD1P8
voltage
enable
NAME
NAME
VSS
O12
IPD
IPU
IS
&
I
Input.
Input, with a weak Internal pull-down.
Input, with a weak Internal pull-up.
Input with Schmitt trigger.
Output 12mA.
VDDA33PLL
VDDA18PLL
VDD33CR
SYMBOL
SYMBOL
REG_EN
VDDA33
ATEST/
VDD18
VDD33
VSS
Table 4.4 Power, Ground, and No Connect
Table 4.3 Miscellaneous Pins (continued)
Table 4.5 Buffer Type Descriptions
TYPE
TYPE
AIO
DATASHEET
13
This signal is used for testing the analog section of the
chip, and to enable or disable the internal 1.8v regulator.
This pin must be connected to VDDA33 to enable the
internal 1.8V regulator, or to VSS to disable the internal
regulator.
When the internal regulator is enabled, the 1.8V power
pins must be left unconnected, except for the required
bypass capacitors.When the PHY is in test mode, the
internal regulator is disabled and the ATEST pin
functions as a test pin.
+3.3V I/O Power.
If the internal core 1.8V regulator is enabled, then this pin
acts as the regulator input
+1.8V core power.
If the internal regulator is enabled, then VDD18 pin 50
must have a 4.7
capacitor to VSS
+3.3V Filtered analog power for the internal PLL
If the internal PLL 1.8V regulator is enabled, then this pin
acts as the regulator input
+1.8V Filtered analog power for internal PLL.
If the internal regulator is enabled, then this pin must
have a 4.7
to VSS
+3.3V I/O power.
+3.3V Filtered analog power.
Ground.
DESCRIPTION
μ
F (or greater) ±20% (ESR <0.1
μ
F (or greater) ±20% (ESR <0.1
FUNCTION
FUNCTION
Revision 2.3 (08-27-07)
Ω)
capacitor
Ω)

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