LTC4269CDKD-2#PBF Linear Technology, LTC4269CDKD-2#PBF Datasheet - Page 22

IC PD/SYNC FORWARD CTRLR 32-DFN

LTC4269CDKD-2#PBF

Manufacturer Part Number
LTC4269CDKD-2#PBF
Description
IC PD/SYNC FORWARD CTRLR 32-DFN
Manufacturer
Linear Technology
Type
Power Over Ethernet (PoE)r
Datasheet

Specifications of LTC4269CDKD-2#PBF

Applications
Power Interface Switch for Power Over Ethernet (PoE) Devices
Voltage - Supply
14 V ~ 16 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-DFN
Current - Supply
1.35mA
Interface
IEEE 802.3af
Controller Type
Powered Device Interface Controller (PD)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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LTC4269-2
applicaTions inForMaTion
An increase of voltage at the SD_V
maximum duty cycle clamp to decrease. If SD_V
resistively divided down from power supply input volt-
age, a volt-second clamp is realized. To adjust the initial
maximum duty cycle clamp, the SS_MAXDC pin voltage
is programmed by a resistor divider from the 2.5V V
pin to GND. An increase of programmed voltage on
SS_MAXDC pin provides an increase of switch maximum
duty cycle clamp.
Soft-Start
The LTC4269-2 provides true PWM soft-start by using the
SS_MAXDC pin to control soft-start timing. The propor-
tional relationship between SS_MAXDC voltage and switch
maximum duty cycle clamp allows the SS_MAXDC pin
to slowly ramp output voltage by ramping the maximum
switch duty cycle clamp—until switch duty cycle clamp
seamlessly meets the natural duty cycle of the converter.
A soft-start event is triggered whenever V
SD_V
overcurrent threshold at OC pin is exceeded. Whenever a
soft-start event is triggered, switching at SOUT and OUT
is stopped immediately.
The SS_MAXDC pin is discharged and only released for
charging when it has fallen below its reset threshold
of 0.45V and all faults have been removed. Increasing
voltage on the SS_MAXDC pin above 0.8V will increase
switch maximum duty cycle. A capacitor to GND on the
SS_MAXDC pin in combination with a resistor divider from
V
Current Mode Topology (I
The LTC4269-2 current mode topology eases frequency
compensation requirements because the output induc-
tor does not contribute to phase delay in the regulator
loop. This current mode technique means that the error
amplifier (nonisolated applications) or the opto-coupler
(isolated applications) commands current (rather than volt-
age) to be delivered to the output. This makes frequency
compensation easier and provides faster loop response
to output load transients.

REF
, defines the soft-start timing.
SEC
is too low (power supply UVLO), or a 107mV
SENSE
Pin)
SEC
pin causes the
IN
is too low,
SEC
REF
is
A resistor divider from the application’s output voltage gen-
erates a voltage at the inverting FB input of the LTC4269-2
error amplifier (or to the input of an external opto-coupler)
and is compared to an accurate reference (1.23V for
LTC4269-2). The error amplifier output (COMP) defines the
input threshold (I
COMP voltages between 0.8V (active threshold) and 2.5V
define a maximum I
By connecting I
source of an external power MOSFET, the MOSFET peak
current trip point (turn off) can be controlled by COMP
level and hence by the output voltage. An increase in output
load current causing the output voltage to fall, will cause
COMP to rise, increasing I
current delivered to the output. For isolated applications,
the error amplifier COMP output can be disabled to allow
the opto-coupler to take control. Setting FB = V
the error amplifier COMP output, reducing pin current to
(COMP – 0.7)/40k.
Slope Compensation
The current mode architecture requires slope compensation
to be added to the current sensing loop to prevent subhar-
monic oscillations which can occur for duty cycles above
50%. Unlike most current mode converters which have a
slope compensation ramp that is fixed internally, placing a
constraint on inductor value and operating frequency, the
LTC4269-2 has externally adjustable slope compensation.
Slope compensation can be programmed by inserting an
external resistor (R
LTC4269-2 has a linear slope compensation ramp which
sources current out of the I
at 0% duty cycle to 35µA at 80% duty cycle.
Overcurrent Detection and Soft-Start (OC Pin)
An added feature to the LTC4269-2 is a precise 107mV
sense threshold at the OC pin used to detect overcurrent
conditions in the converter and set a soft-start latch. The
OC pin is connected directly to the source of the primary-
side MOSFET to monitor peak current in the MOSFET (Fig-
ure 13). The 107mV threshold is constant over the entire
duty cycle range of the converter because it is unaffected
by the slope compensation added to the I
SENSE
SENSE
SLOPE
SENSE
to a sense resistor in series with the
) of the current sense comparator.
) in series with the I
threshold from 0mV to 220mV.
SENSE
SENSE
threshold, increasing the
pin of approximately 8µA
SENSE
SENSE
REF
pin.
disables
pin. The
42692fb

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