LTC4269CDKD-1#TRPBF Linear Technology, LTC4269CDKD-1#TRPBF Datasheet - Page 9

• Manufacturer Part Number: LTC4269CDKD-1#TRPBF
• Description: IC PD/OPTO FLYBACK CTRLR 32-DFN
• Manufacturer: Linear Technology
• Type: Power Over Ethernet (PoE)r

Specifications of LTC4269CDKD-1#TRPBF

• Applications: Power Interface Switch for Power Over Ethernet (PoE) Devices
• Voltage - Supply: 14 V ~ 16 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-DFN
• Current - Supply: 1.35mA
• Interface: IEEE 802.3af
• Controller Type: Powered Device Interface Controller (PD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TYPICAL PERFORMANCE CHARACTERISTICS
PIN FUNCTIONS
SHDN (Pin 1): Shutdown Input. Use this pin for auxiliary
power application. Drive SHDN high to disable LTC4269-1
operation and corrupt the signature resistance. If unused,
tie SHDN to V
T2P (Pin 2): Type 2 PSE Indicator, Open-Drain. Low imped-
ance indicates the presence of a Type 2 PSE.
R
between R
current (see Table 2).
NC (Pins 4, 7, 8, 25, 28, 31): No Connect.
V
Pin 6 must be electrically tied together at the package.
SG (Pin 9): Synchronous Gate Drive Output. This pin
provides an output signal for a secondary-side synchro-
nous rectifi er. Large dynamic currents may fl ow during
voltage transitions. See the Applications Information
section for details.
V
GND with a 4.7μF , or more, capacitor. This pin has a 19.5V
clamp to ground. V
tion that turns the part on when V
15.3V and off at 9.7V. In a conventional trickle-charge
bootstrapped confi guration, the V
PORTN
CC
CLASS
340
330
320
310
300
290
280
270
260
(Pin 10): Supply Voltage Pin. Bypass this pin to
–50
Minimum PG On-Time
vs Temperature
R
(Pins 5, 6): Input Voltage, Negative Rail. Pin 5 and
tON(MIN)
(Pin 3): Class Select Input. Connect a resistor
–25
CLASS
= 158k
PORTN
0
TEMPERATURE (°C)
and V
25
CC
.
has an undervoltage lockout func-
PORTN
50
75
to set the classifi cation load
100
42691 G28
125
CC
CC
is approximately
supply current
300
200
150
100
250
50
0
–50
PG Delay Time vs Temperature
–25
0
TEMPERATURE (°C)
R
R
25
PGDLY
PGDLY
increases signifi cantly during turn-on causing a benign
relaxation oscillation action on the V
not start normally.
t
set the minimum time that the primary switch is on for
each cycle. Minimum turn-on facilitates the isolated feed-
back method. See the Applications Information section
for details.
ENDLY (Pin 12): Pin for external programming resistor to
set enable delay time. The enable delay time disables the
feedback amplifi er for a fi xed time after the turn-off of the
primary-side MOSFET. This allows the leakage inductance
voltage spike to be ignored for fl yback voltage sensing.
See the Applications Information section for details.
SYNC (Pin 13): External Sync Input. This pin is used to
synchronize the internal oscillator with an external clock.
The positive edge of the clock causes the oscillator to
discharge causing PG to go low (off) and SG high (on). The
sync threshold is typically 1.5V. Tie to ground if unused.
See the Applications Information section for details.
SFST (Pin 14): Soft-Start. This pin, in conjunction with a
capacitor (C
primary current through the sense resistor. It is also used
to control converter inrush at start-up. The SFST clamps
ON
50
= 27.4k
= 16.9k
(Pin 11): Pin for external programming resistor to
75
100
42691 G29
SFST
125
) to GND, controls the ramp-up of peak
205
325
305
285
265
245
225
–50
Enable Delay Time
vs Temperature
R
ENDLY
–25
= 90k
0
TEMPERATURE (°C)
LTC4269-1
CC
25
pin if the part does
50
75
100
42691 G30
42691fb
9
125