LTC4269IDKD-1#TRPBF Linear Technology, LTC4269IDKD-1#TRPBF Datasheet - Page 21

• Manufacturer Part Number: LTC4269IDKD-1#TRPBF
• Description: IC PD/OPTO FLYBACK CTRLR 32-DFN
• Manufacturer: Linear Technology
• Type: Power Over Ethernet (PoE)r

Specifications of LTC4269IDKD-1#TRPBF

• Applications: Power Interface Switch for Power Over Ethernet (PoE) Devices
• Voltage - Supply: 14 V ~ 16 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-DFN
• Current - Supply: 1.35mA
• Interface: IEEE 802.3af
• Controller Type: Powered Device Interface Controller (PD)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
SWITCHING REGULATOR OVERVIEW
The LTC4269-1 includes a current mode converter designed
specifi cally for use in an isolated fl yback topology employing
synchronous rectifi cation. The LTC4269-1 operation is
similar to traditional current mode switchers. The major
difference is that output voltage feedback is derived via
sensing the output voltage through the transformer. This
precludes the need of an opto-isolator in isolated designs,
thus greatly improving dynamic response and reliability.
The LTC4269-1 has a unique feedback amplifi er that
samples a transformer winding voltage during the fl yback
period and uses that voltage to control output voltage.
The internal blocks are similar to many current mode
controllers. The differences lie in the feedback amplifi er and
load compensation circuitry. The logic block also contains
circuitry to control the special dynamic requirements of
fl yback control. For more information on the basics of
current mode switcher/controllers and isolated fl yback
converters see Application Note 19.
Feedback Amplifi er—Pseudo DC Theory
For the following discussion, refer to the simplifi ed
Switching Regulator Feedback Amplifi er diagram (Figure
10A). When the primary-side MOSFET switch MP turns off,
its drain voltage rises above the V
when the primary MOSFET is off and the synchronous
secondary MOSFET is on. During fl yback the voltage on
nondriven transformer pins is determined by the secondary
voltage. The amplitude of this fl yback pulse, as seen on
the third winding, is given as:
R
I
ESR = impedance of secondary circuit capacitor, winding
and traces
N
turns ratio (i.e., N
The fl yback voltage is scaled by an external resistive
divider R1/R2 and presented at the FB pin. The feedback
amplifi er compares the voltage to the internal bandgap
reference. The feedback amp is actually a transconductance
SEC
DS(ON)
SF
V
= transformer effective secondary-to-fl yback winding
FLBK
= transformer secondary current
= on-resistance of the synchronous MOSFET MS
=
V
OUT
+I
S
SEC
/N
FLBK
• ESR + R
N
(
SF
)
DS(ON)
PORTP
)
rail. Flyback occurs
amplifi er whose output is connected to V
a period in the fl yback time. An external capacitor on
the V
provide the control voltage to set the current mode trip
point. The regulation voltage at the FB pin is nearly equal
to the bandgap reference V
the overall loop. The relationship between V
is expressed as:
Combining this with the previous V
an expression for V
programming resistors and secondary resistances:
The effect of nonzero secondary output impedance is
discussed in further detail (see Load Compensation
Theory). The practical aspects of applying this equation for
V
Information.
Feedback Amplifi er Dynamic Theory
So far, this has been a pseudo-DC treatment of fl yback
feedback amplifi er operation. But the fl yback signal is a
pulse, not a DC level. Provision is made to turn on the
fl yback amplifi er only when the fl yback pulse is present,
using the enable signal as shown in the timing diagram
(Figure 10b).
Minimum Output Switch On Time (t
The LTC4269-1 affects output voltage regulation via
fl yback pulse action. If the output switch is not turned on,
there is no fl yback pulse and output voltage information
is not available. This causes irregular loop response and
start-up/latchup problems. The solution is to require the
primary switch to be on for an absolute minimum time per
each oscillator cycle. To accomplish this the current limit
feedback is blanked each cycle for t
is less than that developed under these conditions, forced
continuous operation normally occurs. See subsequent
discussions in the Applications Information section for
further details.
OUT
V
V
FLBK
OUT
CMP
are found in subsequent sections of the Applications
=
=
pin integrates the net feedback amp current to
⎛
⎝ ⎜
R1+ R2
R1+ R2
R2
R2
• V
• V
OUT
FB
FB
in terms of the internal reference,
• N
SF
FB
⎞
⎠ ⎟
because of the high gain in
−I
SEC
ON(MIN)
FLBK
LTC4269-1
• ESR + R
ON(MIN)
(
expression yields
. If the output load
CMP
FLBK
)
only during
DS(ON)
and V
21
)
42691fb
FB