LTC4269IDKD-2#PBF Linear Technology, LTC4269IDKD-2#PBF Datasheet - Page 10

IC PD/SYNC FORWARD CTRLR 32-DFN

LTC4269IDKD-2#PBF

Manufacturer Part Number
LTC4269IDKD-2#PBF
Description
IC PD/SYNC FORWARD CTRLR 32-DFN
Manufacturer
Linear Technology
Type
Power Over Ethernet (PoE)r
Datasheet

Specifications of LTC4269IDKD-2#PBF

Applications
Power Interface Switch for Power Over Ethernet (PoE) Devices
Voltage - Supply
14 V ~ 16 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-DFN
Current - Supply
1.35mA
Interface
IEEE 802.3af
Controller Type
Powered Device Interface Controller (PD)
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
32
Mounting
Surface Mount
Package Type
DFN EP
Case Length
7mm
Screening Level
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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pin FuncTions
LTC4269-2
SHDN (Pin 1): Shutdown Input. Use this pin for auxiliary
power application. Drive SHDN high to disable LTC4269-2
operation and corrupt the signature resistance. If unused,
tie SHDN to V
T2P (Pin 2): Type-2 PSE Indicator, Open-Drain. Low
impedance indicates the presence of a Type-2 PSE.
R
between R
current.
V
the diode bridge. Pins 5 and 6 must be electrically tied
together at the package.
NC (Pins 4, 7, 8, 25, 30, 31): No Connect.
COMP (Pin 9): Output Pin of the Error Amplifier. The error
amplifier is an op amp, allowing various compensation
networks to be connected between the COMP pin and
FB pin for optimum transient response in a nonisolated
supply. The voltage on this pin corresponds to the peak
current of the external FET. Full operating voltage range is
between 0.8V and 2.5V corresponding to 0mV to 220mV
at the I
pin for overcurrent detection, typical operating range for
the COMP pin is 0.8V to 1.6V. For isolated applications
where COMP is controlled by an opto-coupler, the COMP
pin output drive can be disabled with FB = V
the COMP pin current to (COMP – 0.7)/40k.
FB (Pin 10): In a nonisolated supply, FB monitors the output
voltage via an external resistor divider and is compared
with an internal 1.23V reference by the error amplifier. FB
connected to V
R
frequency of the IC between 100kHz and 500kHz. Nominal
voltage on the R
0
PORTN
CLASS
OSC
(Pin11): A resistor to GND programs the operating
SENSE
(Pins 5, 6): Power Input. Tie to the PD input through
(Pin 3): Class Select Input. Connect a resistor
CLASS
pin. For applications using the 100mV OC
PORTN
REF
OSC
and V
disables error amplifier output.
.
pin is 1.0V.
PORTN
to set the classification load
REF
, reducing
SYNC (Pin 12): Used to synchronize the internal oscillator
to an external signal. It is directly logic compatible and
can be driven with any signal between 10% and 90% duty
cycle. If unused, the pin should be connected to GND.
SS_MAXDC (Pin 13): The external resistor divider from
V
1.84V, SD_V
on SS_MAXDC pin in combination with external resistor
divider sets soft-start timing.
V
which supplies internal control circuitry. Capable of sourc-
ing up to 2.5mA drive for external use. Bypass to GND
with a 0.1µF ceramic capacitor.
SD_V
its accurate 1.32V threshold, is used to turn off the IC and
reduce current drain from V
nected to system input voltage through a resistor divider to
define undervoltage lockout (UVLO) for the power supply
and to provide a volt-second clamp on the OUT pin. An
11µA pin current hysteresis allows external programming
of UVLO hysteresis.
GND (Pin 16): Analog Ground. Tie to V
BLANK (Pin 17): A resistor to GND adjusts the extended
blanking period of the overcurrent and current sense
amplifier outputs during FET turn-on—to prevent false
current limit trip. Increasing the resistor value increases
the blanking period.
I
Loop. Connect this pin to the sense resistor in the source
of the external power MOSFET. A resistor in series with
the I
SENSE
REF
REF
SENSE
sets the maximum duty cycle clamp (SS_MAXDC =
(Pin 14): The output of an internal 2.5V reference
SEC
(Pin 18): The Current Sense Input for the Control
(Pin 15): The SD_V
pin programs slope compensation.
SEC
= 1.32V gives 72% duty cycle). Capacitor
IN
SEC
. The SD_V
pin, when pulled below
NEG
SEC
.
pin is con-
42692fb

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