LTC4269IDKD-2#PBF Linear Technology, LTC4269IDKD-2#PBF Datasheet - Page 27

• Manufacturer Part Number: LTC4269IDKD-2#PBF
• Description: IC PD/SYNC FORWARD CTRLR 32-DFN
• Manufacturer: Linear Technology
• Type: Power Over Ethernet (PoE)r

Specifications of LTC4269IDKD-2#PBF

• Applications: Power Interface Switch for Power Over Ethernet (PoE) Devices
• Voltage - Supply: 14 V ~ 16 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-DFN
• Current - Supply: 1.35mA
• Interface: IEEE 802.3af
• Controller Type: Powered Device Interface Controller (PD)
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Pin Count: 32
• Mounting: Surface Mount
• Package Type: DFN EP
• Case Length: 7mm
• Screening Level: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

applicaTions inForMaTion
SOUT
OUT
SS_MAXDC
SS_MAXDC
SS_MAXDC
SOFT-START
EVENT TRIGGERED
FAULTS TRIGGERING SOFT-START
V
OR
SD_V
OR
OC > 107mV (OVERCURRENT)
IN
< 8.75V
SEC
C
SS
< 1.32V (UVLO)
Figure 18. Programming Soft-Start Timing
R
B
R
t
T
DELAY
Figure 17. Soft-Start Timing
Figure 16. Timing Diagram
SS_MAXDC CHARGING MODEL
SS_MAXDC(DC) = V
R
SS_MAXDC
V
CHARGE
: PROGRAMMABLE SYNCHRONOUS DELAY
LTC4269-2
REF
TIMING (A): SOFT START FAULT REMOVED
BEFORE SS_MAXDC FALLS TO 0.45V
TIMING (B): SOFT-START FAULT REMOVED
AFTER SS_MAXDC FALLS PAST 0.45V
= [R
T
• R
B
SOFT-START
SS_MAXDC(DC)
/(R
LATCH SET
REF
T
[R
+ R
B
/(R
B
)]
R
T
CHARGE
+ R
42692 F17
B
)]
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.2V
SOFT-START LATCH RESET:
V
(> 8.75V IF LATCH SET BY OC)
AND
SD_V
AND
OC < 107mV
AND
SS_MAXDC < 0.45V
IN
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.2V
C
> 14.25V
SS
SEC
> 1.32V
SS_MAXDC
LTC4269-2
42692 F18
42692 F16
using the SS_MAXDC pin to control soft-start timing. The
proportional relationship between SS_MAXDC voltage and
switch maximum duty cycle clamp allows the SS_MAXDC
pin to slowly ramp output voltage by ramping the maximum
switch duty cycle clamp—until switch duty cycle clamp
seamlessly meets the natural duty cycle of the converter.
A capacitor C
divider from V
cycle clamp, determine soft-start timing (Figure 18).
A soft-start event is triggered for the following faults:
(1) V
(2) SD_V
(3) OC > 107mV (overcurrent condition)
When a soft-start event is triggered, switching at SOUT
and OUT is stopped immediately. A soft-start latch is set
and SS_MAXDC pin is discharged. The SS_MAXDC pin can
only recharge when the soft-start latch has been reset.
Note: A soft-start event caused by (1) or (2) above, also
causes V
Soft-start latch reset requires all of the following:
(A) V
(B) SD_V
(C) OC < 107mV, and
(D) SS_MAXDC < 0.45V (SS_MAXDC reset threshold)
*V
set by overcurrent condition in (3) above.
SS_MAXDC Discharge Timing
It can be seen in Figure 17 that two types of discharge
can occur for the SS_MAXDC pin. In timing (A) the fault
that caused the soft-start event has been removed be-
fore SS_MAXDC falls to 0.45V. This means the soft-start
latch will be reset when SS_MAXDC falls to 0.45V and
SS_MAXDC will begin charging. In timing (B), the fault that
caused the soft-start event is not removed until some time
after SS_MAXDC has fallen past 0.45V. The SS_MAXDC
pin continues to discharge to 0.2V and remains low until
all faults are removed.
IN
IN
IN
> 8.75V is okay for latch reset if the latch was only
< 8.75V, or
> 14.25V*, and
REF
SEC
SEC
to be disabled and to fall to GND.
< 1.32V (UVLO), or
> 1.32V, and
SS
REF
on the SS_MAXDC pin and the resistor
used to program maximum switch duty
LTC4269-2

42692fb