LTC4269CDKD-1#PBF Linear Technology, LTC4269CDKD-1#PBF Datasheet - Page 35

IC PD/OPTO FLYBACK CTRLR 32-DFN

LTC4269CDKD-1#PBF

Manufacturer Part Number
LTC4269CDKD-1#PBF
Description
IC PD/OPTO FLYBACK CTRLR 32-DFN
Manufacturer
Linear Technology
Type
Power Over Ethernet (PoE)r
Datasheet

Specifications of LTC4269CDKD-1#PBF

Applications
Power Interface Switch for Power Over Ethernet (PoE) Devices
Voltage - Supply
14 V ~ 16 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-DFN
Current - Supply
1.35mA
Interface
IEEE 802.3af
Controller Type
Powered Device Interface Controller (PD)
Input Voltage
60V
Supply Current
6.4mA
Digital Ic Case Style
DFN
No. Of Pins
32
Duty Cycle (%)
88%
Frequency
100kHz
Operating Temperature Range
0°C To +70°C
Msl
MSL 1 - Unlimited
Rohs Compliant
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
32
Mounting
Surface Mount
Package Type
DFN EP
Case Length
7mm
Screening Level
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIONS INFORMATION
The LTC4269-1 gate drives will clamp the max gate voltage
to roughly 7.5V, so you can safely use MOSFETs with
maximum V
Synchronous Gate Drive
There are several different ways to drive the synchronous
gate MOSFET. Full converter isolation requires the synchro-
nous gate drive to be isolated. This is usually accomplished
by way of a pulse transformer. Usually the pulse driver is
used to drive a buffer on the secondary, as shown in the
application on the front page of this data sheet.
However, other schemes are possible. There are gate drivers
and secondary-side synchronous controllers available
that provide the buffer function as well as additional
features.
Capacitor Selection
In a fl yback converter, the input and output current fl ows
in pulses, placing severe demands on the input and output
fi lter capacitors. The input and output fi lter capacitors
are selected based on RMS current ratings and ripple
voltage.
Select an input capacitor with a ripple current rating
greater than:
Continuing the example:
Keep input capacitor series resistance (ESR) and inductance
(ESL) small, as they affect electromagnetic interference
suppression. In some instances, high ESR can also
produce stability problems because fl yback converters
exhibit a negative input resistance characteristic. Refer
to Application Note 19 for more information.
The output capacitor is sized to handle the ripple current
and to ensure acceptable output voltage ripple. The output
I
I
RMS(PRI)
RMS(PRI)
GS
=
=
V
29.5W
of 10V and larger.
IN(MIN)
41V
P
IN
1− 49.4%
1− DC
49.4%
DC
MAX
MAX
= 0.728A
capacitor should have an RMS current rating greater
than:
This is calculated for each output in a multiple winding
application.
ESR and ESL along with bulk capacitance directly affect the
output voltage ripple. The waveforms for a typical fl yback
converter are illustrated in Figure 17.
The maximum acceptable ripple voltage (expressed as a
percentage of the output voltage) is used to establish a
starting point for the capacitor values. For the purpose
of simplicity, we will choose 2% for the maximum output
ripple, divided equally between the ESR step and the
charging/discharging ΔV. This percentage ripple changes,
depending on the requirements of the application. You can
modify the following equations.
For a 1% contribution to the total ripple voltage, the ESR
of the output capacitor is determined by:
I
I
Continuing the example:
ESR
RMS(SEC)
RMS(SEC)
RIPPLE WAVEFORM
OUTPUT VOLTAGE
Figure 17. Typical Flyback Converter Waveforms
COUT
SECONDARY
PRIMARY
CURRENT
CURRENT
≤ 1% •
=I
= 5.3A
OUT
ΔV
V
COUT
I
1− DC
OUT
PRI
1− 49.4%
DC
ΔV
49.4%
ESR
• 1− DC
MAX
(
I
MAX
OUT
= 5.24A
MAX
I
PRI
N
LTC4269-1
DUE TO ESL
)
RINGING
42691 F17
35
42691fb

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