LTC4269CDKD-1#PBF Linear Technology, LTC4269CDKD-1#PBF Datasheet - Page 27

• Manufacturer Part Number: LTC4269CDKD-1#PBF
• Description: IC PD/OPTO FLYBACK CTRLR 32-DFN
• Manufacturer: Linear Technology
• Type: Power Over Ethernet (PoE)r

Specifications of LTC4269CDKD-1#PBF

• Applications: Power Interface Switch for Power Over Ethernet (PoE) Devices
• Voltage - Supply: 14 V ~ 16 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-DFN
• Current - Supply: 1.35mA
• Interface: IEEE 802.3af
• Controller Type: Powered Device Interface Controller (PD)
• Input Voltage: 60V
• Supply Current: 6.4mA
• Digital Ic Case Style: DFN
• No. Of Pins: 32
• Duty Cycle (%): 88%
• Frequency: 100kHz
• Operating Temperature Range: 0°C To +70°C
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 32
• Mounting: Surface Mount
• Package Type: DFN EP
• Case Length: 7mm
• Screening Level: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
in an abrupt increase in inductor ripple current and,
consequently, output voltage ripple. Do not allow the core
to saturate! The maximum peak primary current occurs
at minimum V
Using the example numbers leads to:
Multiple Outputs
One advantage that the fl yback topology offers is that
additional output voltages can be obtained simply by adding
windings. Designing a transformer for such a situation is
beyond the scope of this document. For multiple windings,
realize that the fl yback winding signal is a combination of
activity on all the secondary windings. Thus load regulation
is affected by each winding’s load. Take care to minimize
cross regulation effects.
Setting Feedback Resistive Divider
The expression for V
is rearranged to yield the following expression for the
feedback resistors:
I
now :
DC
X
PK
MIN
I
R1= R2
MAX
PK
=
= 0.267
V
=
=
IN(MIN)
=
(
41• 0.494
V
1+
29.5W
IN(MIN)
⎛
⎜
⎜
⎝
f
OSC
⎡
⎣
P
N • V
V
IN
IN
• DC
OUT
:
• L
V
1
• DC
OUT
IN MIN
MAX
P
+I
• 1+
OUT
(
⎛
⎝ ⎜
• P
SEC
MAX
IN
developed in the Operation section
• 1+
V
)
⎛
⎝ ⎜
FB
0.267
• ESR + R
=
)
(
2
2
1+
• N
=
X
SF
MIN
200kHz • 260µH • 29.5W
8
1
2
⎞
⎠ ⎟
1
•
= 1.65A
41
⎞
⎠ ⎟
5
DS(ON)
(
41• 49.4%
= 49.4%
)
⎤
⎦
− 1
⎞
⎟
⎟
⎠
)
2
Continuing the example, if ESR + R
3.32k, then:
choose 37.4k.
It is recommended that the Thevenin impedance of the
resistive divider (R1||R2) is roughly 3k for bias current
cancellation and other reasons.
Current Sense Resistor Considerations
The external current sense resistor is used to control peak
primary switch current, which controls a number of key
converter characteristics including maximum power and
external component ratings. Use a noninductive current
sense resistor (no wire-wound resistors). Mounting the
resistor directly above an unbroken ground plane connected
with wide and short traces keeps stray resistance and
inductance low.
The dual sense pins allow for a full Kelvin connection. Make
sure that SENSE+ and SENSE– are isolated and connect
close to the sense resistor.
Peak current occurs at 100mV of sense voltage V
the nominal sense resistor is V
peak switch current of 10A requires a nominal sense resistor
of 0.010Ω Note that the instantaneous peak power in the
sense resistor is 1W, and that it is rated accordingly. The
use of parallel resistors can help achieve low resistance,
low parasitic inductance and increased power capability.
Size R
V
assume that our worst-case conditions yield an I
above nominal, so I
on R
110% = 88mV/2.3A and nominal R
to the nearest available lower value, 33mΩ.
SENSE
R1= 3.32k
SENSE
SENSE
and maximum V
and minimum V
using worst-case conditions, minimum L
⎛
⎝ ⎜
5 + 5.3 • 0.008
1.237 • 1/ 3
PK
= 2.3A. If there is a 10% tolerance
IN
. Continuing the example, let us
SENSE
− 1
SENSE
⎞
⎠ ⎟
= 88mV, then R
SENSE
LTC4269-1
= 37.28k
DS(ON)
/I
PK
. For example, a
= 35mΩ. Round
= 8mΩ, R2 =
PK
SENSE
27
SENSE
of 40%
42691fb
. So
P
•
,