IC PD/OPTO FLYBACK CTRLR 32-DFN

LTC4269CDKD-1#PBF

Manufacturer Part NumberLTC4269CDKD-1#PBF
DescriptionIC PD/OPTO FLYBACK CTRLR 32-DFN
ManufacturerLinear Technology
TypePower Over Ethernet (PoE)
LTC4269CDKD-1#PBF datasheet
 


Specifications of LTC4269CDKD-1#PBF

ApplicationsPower Interface Switch for Power Over Ethernet (PoE) DevicesVoltage - Supply14 V ~ 16 V
Operating Temperature0°C ~ 70°CMounting TypeSurface Mount
Package / Case32-DFNCurrent - Supply1.35mA
InterfaceIEEE 802.3afController TypePowered Device Interface Controller (PD)
Input Voltage60VSupply Current6.4mA
Digital Ic Case StyleDFNNo. Of Pins32
Duty Cycle (%)88%Frequency100kHz
Operating Temperature Range0°C To +70°CMslMSL 1 - Unlimited
Rohs CompliantYesOperating Temperature (max)70C
Operating Temperature (min)0CPin Count32
MountingSurface MountPackage TypeDFN EP
Case Length7mmScreening LevelCommercial
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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LTC4269-1
APPLICATIONS INFORMATION
Selecting the Load Compensation Resistor
The expression for R
was derived in the Operation
CMP
section as:
(
)
R
• 1− DC
SENSE
= K1•
R
• R1• N
CMP
ESR + R
DS(ON)
Continuing the example:
V
5
OUT
=
= 0.116
K1=
⎝ ⎜
⎠ ⎟
V
• Eff
48 • 90%
IN
1
1
=
DC=
N•V
1
48
IN(NOM)
1+
1+
8
V
OUT
If ESR + R
= 8mΩ
DS(ON)
(
33mΩ • 1− 0.455
= 0.116 •
R
CMP
8mΩ
= 3.25k
This value for R
is a good starting point, but empirical
CMP
methods are required for producing the best results.
This is because several of the required input variables
are diffi cult to estimate precisely. For instance, the ESR
term above includes that of the transformer secondary,
but its effective ESR value depends on high frequency
behavior, not simply DC winding resistance. Similarly, K1
appears as a simple ratio of V
to V
IN
but theoretically estimating effi ciency is not a simple
calculation.
The suggested empirical method is as follows:
1. Build a prototype of the desired supply including the
actual secondary components.
2. Temporarily ground the C
pin to disable the load
CMP
compensation function. Measure output voltage while
sweeping output current over the expected range.
Approximate the voltage variation as a straight line.
ΔV
/ΔI
= R
.
OUT
OUT
S(OUT)
3. Calculate a value for the K1 constant based on V
and the measured effi ciency.
28
4. Compute:
R
CMP
5. Verify this result by connecting a resistor of this value
SF
from the R
6. Disconnect the ground short to C
fi lter capacitor to ground. Measure the output imped-
ance R
S(OUT)
in place. R
Fine tuning is accomplished experimentally by slightly
= 45.5%
altering R
5
′ R
CMP
)
1
• 37.4kΩ •
where R′
3
resistor. R
in place and R
load compensation (from step 2).
Setting Frequency
The switching frequency of the LTC4269-1 is set by an
external capacitor connected between the OSC pin and
ground. Recommended values are between 200pF and
33pF , yielding switching frequencies between 50kHz and
250kHz. Figure 12 shows the nominal relationship between
times effi ciency,
OUT
external capacitance and switching frequency. Place the
capacitor as close as possible to the IC and minimize OSC
, V
IN
OUT
R
SENSE
= K1•
• R1• N
SF
R
S(OUT)
pin to ground.
CMP
and connect a 0.1μF
CMP
= ΔV
/ΔI
with the new compensation
OUT
OUT
should have decreased signifi cantly.
S(OUT)
. A revised estimate for R
CMP
CMP
R
S(OUT)CMP
= R
• 1+
CMP
R
S(OUT)
is the new value for the load compensation
C MP
is the output impedance with R
S(OUT)CMP
is the output impedance with no
S(OUT)
300
200
100
50
30
100
200
C
(pF)
OSC
42691 F12
Figure 12. f
vs OSC Capacitor Values
OSC
is:
CMP
42691fb