TDA8034AT/C1,112 NXP Semiconductors, TDA8034AT/C1,112 Datasheet

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TDA8034AT/C1,112

Manufacturer Part Number
TDA8034AT/C1,112
Description
IC SMART CARD INTERFACE 16SOIC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA8034AT/C1,112

Controller Type
Smart Card Interface
Interface
Analog
Voltage - Supply
3V, 5V
Current - Supply
65mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1. General description
2. Features and benefits
3. Applications
The TDA8034T/TDA8034AT is a cost-effective analog interface for asynchronous and
synchronous smart cards operating at 5 V or 3 V. Using few external components, the
TDA8034T/TDA8034AT provides all supply, protection and control functions between a
smart card and the microcontroller.
TDA8034T; TDA8034AT
Smart card interface
Rev. 3.0 — 17 January 2011
Integrated circuit smart card interface in an SO16 package
5 V or 3 V smart card supply
One protected half-duplex bidirectional buffered I/O line (C7)
V
Thermal and short-circuit protection for all card contacts
Automatic activation and deactivation sequences triggered by a short-circuit, card
take-off, overheating, falling V
Enhanced card-side ElectroStatic Discharge (ESD) protection of > 6 kV
External clock input up to 26 MHz connected to pin XTAL1
Card clock generation up to 20 MHz using pin CLKDIV1 with synchronous frequency
changes of:
Non-inverted control of pin RST using pin RSTIN
Compatible with ISO 7816, NDS and EMV 4.2 payment systems
Supply supervisor for killing spikes during power on and off:
Built-in debouncing on card presence contacts (typically 4.5 ms)
Multiplexed status signal using pin OFFN
Pay TV
Electronic payment
CC
5 V ± 5 % or 3 V ± 5 % using two low ESR multilayer ceramic capacitors: one of
220 nF and one of 470 nF
current spikes of 40 nA/s (V
20 MHz, with controlled rise and fall times and filtered overload detection of
approximately 120 mA
1
f
using a fixed threshold
using an external resistor bridge with threshold adjustment
xtal
regulation:
2
f
or
xtal
1
or
2
1
f
xtal
4
on TDA8034AT
f
xtal
on TDA8034T
DD
CC
, V
= 5 V and 3 V) or 15 nA/s (V
DD(INTF)
or V
DDP
CC
Product data sheet
=1.8 V) up to

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TDA8034AT/C1,112 Summary of contents

Page 1

TDA8034T; TDA8034AT Smart card interface Rev. 3.0 — 17 January 2011 1. General description The TDA8034T/TDA8034AT is a cost-effective analog interface for asynchronous and synchronous smart cards operating Using few external components, the TDA8034T/TDA8034AT ...

Page 2

... NXP Semiconductors Identification Bank card readers 4. Quick reference data Table 1. Quick reference data 3 DDP DD DD(INTF) Symbol Parameter Supply V power supply voltage DDP V supply voltage DD V interface supply voltage DD(INTF) I supply current DD I power supply current DDP I interface supply current DD(INTF) [1] Card supply voltage: pin V ...

Page 3

... NXP Semiconductors 6. Block diagram V DD INTERNAL REFERENCE VOLTAGE 7 PRESN 4 RSTIN 5 CMDVCCN 15 LEVEL OFFN SHIFTER 6 CLKDIV1 16 I/OUC 3 V DD(INTF) XTAL1 100 nF Fig 1. Block diagram TDA8034T_TDA8034AT Product data sheet 100 nF GND 14 9 SUPPLY INTERNAL OSCILLATOR CLKUP ALARMN EN1 SENSE PVCC SEQUENCER EN4 EN3 ...

Page 4

... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 2. 7.2 Pin description Table 3. Pin description Symbol Pin Supply Type XTAL1 XTAL2 DD(INTF) DD(INTF) RSTIN DD(INTF) CMDVCCN DD(INTF) CLKDIV1 DD(INTF) PRESN DD(INTF) I I/O CC GND CLK RST DDP DDP OFFN DD(INTF) I/OUC 16 V I/O DD(INTF) [ input output, I/O = input/output ground and P = power supply ...

Page 5

... NXP Semiconductors [5] Uses an internal 20 kΩ pull-up resistor connected to pin V [6] Uses an internal 10 kΩ pull-up resistor connected to pin V 8. Functional description Remark: Throughout this document the ISO 7816 terminology conventions have been adhered to and it is assumed that the reader is familiar with these. ...

Page 6

... NXP Semiconductors The voltage supervisor monitors the voltage of the V Power-On Reset (POR) and supply drop-out detection during a card session. The supervisor threshold voltages for V than V th has reached a level higher than V The output of the supervisor is sent to a digital controller in order to reset the TDA8034T/TDA8034AT. This defined reset pulse of approximately 8 ms, i.e. (t ∨ ...

Page 7

... NXP Semiconductors Fig 5. The clock frequency is selected using pin CLKDIV1 to be either TDA8034T or f The frequency change is synchronous and as such during transition, no pulse is shorter than the smallest period. In addition, only the first and last clock pulse around the change has the correct width. When dynamically changing the frequency, the modification is only effective after 10 clock periods on pin XTAL1 ...

Page 8

... NXP Semiconductors 8.5 Shutdown mode After a power-on reset, if pin CMDVCCN is HIGH, the circuit enters the Shutdown mode, ensuring only the minimum number of circuits are active while the TDA8034T/TDA8034AT waits for the microcontroller to start a session. • all card contacts are inactive. The impedance between the contacts and GND is approximately 200 Ω ...

Page 9

... NXP Semiconductors CMDVCCN XTAL V CC I/O CLK RSTIN RST I/OUC OSCINT Fig 6. 8.7 Deactivation sequence When a session ends, the microcontroller sets pin CMDVCCN HIGH. The TDA8034T/TDA8034AT then executes an automatic deactivation sequence by counting the sequencer back to the inactive state (see 1. Pin RST is pulled LOW (t11). ...

Page 10

... NXP Semiconductors Remark: The value of period times the period interval of the internal oscillator (i.e. ± 25 μs). CMDVCC XTAL1 OSCINT Fig 7. 8.8 V regulator CC The V CC The V CC 120 mA. This detection is internally filtered, enabling spurious current pulses up to 200 mA with a duration of a few milliseconds to be drawn by the card without causing deactivation. However, the average current value must stay below maximum ...

Page 11

... NXP Semiconductors • In card sessions, pin CMDVCCN is LOW: when pin OFFN goes LOW, the fault detection circuit triggers the automatic emergency deactivation sequence (see Figure deactivation sequence, pin OFFN is rechecked. If the card is still present, pin OFFN returns to HIGH. This check identifies the fault as either a hardware problem or a card removal incident ...

Page 12

... NXP Semiconductors PRESN OFFN CMDVCCN V CC (1) Deactivation caused by card withdrawal. (2) Deactivation caused by short-circuit. Fig 9. Operation of debounce feature with pins OFFN, CMDVCCN, PRESN and V 8.10 Automatic determining of card supply voltage The supply voltage (V the duration of the HIGH state (logic 1) on pin CMDVCCN before the activation command (CMDVCCN falling edge) occurs ...

Page 13

... NXP Semiconductors Fig 12. Card activation pin CMDVCCN is HIGH for more than 30 ms (card inactive), and if the card needs to be activated the sequence shown in LOW for t1 (200 μs < t1 < 700 μs), and then HIGH for t2 (200 μs < t2 < 15 ms) before going LOW. ...

Page 14

... NXP Semiconductors 11. Characteristics Table 7. Characteristics of IC supply voltage 3 DDP DD DD(INTF) Symbol Parameter Supply V power supply voltage DDP V supply voltage DD V interface supply voltage pin V DD(INTF) I supply current DD I power supply current DDP I interface supply current Shutdown mode DD(INTF) V threshold voltage th V hysteresis voltage ...

Page 15

... NXP Semiconductors Table 7. Characteristics of IC supply voltage 3 DDP DD DD(INTF) Symbol Parameter SR slew rate Crystal oscillator: pins XTAL1 and XTAL2 C external capacitance ext f crystal frequency xtal f external frequency ext V LOW-level input IL voltage V HIGH-level input IH voltage Data lines: pins I/O and I/OUC t delay time ...

Page 16

... NXP Semiconductors Table 7. Characteristics of IC supply voltage 3 DDP DD DD(INTF) Symbol Parameter t input fall time f(i) t output fall time f(o) R pull-up resistance pu I pull-up current pu Data lines to the system: pin I/OUC V LOW-level output OL voltage V HIGH-level output OH voltage V LOW-level input IL voltage V HIGH-level input ...

Page 17

... NXP Semiconductors Table 7. Characteristics of IC supply voltage 3 DDP DD DD(INTF) Symbol Parameter V LOW-level output OL voltage V HIGH-level output OH voltage t rise time r t fall time f Clock output to the card: pin CLK V output voltage o I output current o V LOW-level output OL voltage V HIGH-level output OH voltage t rise time ...

Page 18

... NXP Semiconductors Table 7. Characteristics of IC supply voltage 3 DDP DD DD(INTF) Symbol Parameter f frequency on pin CMDVCCN CMDVCCN t pulse width w [6][7] Card detection input V LOW-level input IL voltage V HIGH-level input IH voltage V hysteresis voltage hys I LOW-level input current 0 V < HIGH-level input IH current [8] OFFN output V LOW-level output ...

Page 19

... NXP Semiconductors Table 9. Timing characteristics Symbol Parameter t activation time act t deactivation time deact t delay time d t debounce time deb Fig 13. Definition of output and input transition times 12. Application information V DD(INTF) Fig 14. Application diagram TDA8034T_TDA8034AT Product data sheet TDA8034T; TDA8034AT Conditions see Figure 9 on page 12 ...

Page 20

... NXP Semiconductors 13. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 21

... NXP Semiconductors 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...

Page 22

... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...

Page 23

... NXP Semiconductors Fig 16. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 15. Abbreviations Table 12. Acronym EMV ESD ESR FCDM HBM LDO MM NMOS POR TDA8034T_TDA8034AT Product data sheet maximum peak temperature ...

Page 24

... NXP Semiconductors 16. Revision history Table 13. Revision history Document ID TDA8034T_TDA8034AT v.3.0 Modifications: TDA8034T_TDA8034AT v.2.0 Modifications: TDA8034T_TDA8034AT_1 TDA8034T_TDA8034AT Product data sheet Release date Data sheet status 20110117 Product data sheet • Table 2 “Ordering information”: type numbers updated into TDA8034T/C1 and TDA8034AT/C1 • ...

Page 25

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 26

... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 27

... NXP Semiconductors 19. Tables 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 5 8.1 Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 Voltage supervisor . . . . . . . . . . . . . . . . . . . . . . 5 8.3 Clock circuits ...

Page 28

... NXP Semiconductors 20. Figures Fig 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Fig 2. Pin configuration (SO16 Fig 3. Voltage supervisor circuit . . . . . . . . . . . . . . . . . . . .5 Fig 4. Voltage supervisor waveforms . . . . . . . . . . . . . . . .6 Fig 5. Basic layout for using an external clock Fig 6. Activation sequence at t3 Fig 7. Deactivation sequence . . . . . . . . . . . . . . . . . . . .10 Fig 8. Emergency deactivation sequence after card removal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Fig 9. Operation of debounce feature with pins OFFN, CMDVCCN, PRESN and V Fig 10 ...

Page 29

... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional description . . . . . . . . . . . . . . . . . . . 5 8.1 Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 Voltage supervisor . . . . . . . . . . . . . . . . . . . . . . 5 8.3 Clock circuits ...

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