S-8204BAD-TCT1S Seiko Instruments, S-8204BAD-TCT1S Datasheet - Page 10

• Manufacturer Part Number: S-8204BAD-TCT1S
• Description: Battery Management BATTERY PROT IC 3-4 SERIES CELL PCK
• Manufacturer: Seiko Instruments

Specifications of S-8204BAD-TCT1S

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10
BATTERY PROTECTION IC FOR 3-SERIES OR 4-SERIES CELL PACK
S-8204B Series
3.
2. 6 CTLC Input Voltage “H” (V
2. 7 CTLD Input Voltage “H” (V
2. 8 SEL Input Voltage “H” (V
3. 1 CCT pin Internal Resistance (R
3. 2 CDT pin Internal Resistance (R
3. 3 CIT pin Internal Resistance 1 (R
3. 4 CIT pin Internal Resistance 2 (R
3. 5 CCT pin Detection Voltage (V
3. 6 CDT pin Detection Voltage (V
CCT pin Internal Resistance, CDT pin Internal Resistance, CIT pin Internal Resistance 1, CIT pin
Internal Resistance 2, CCT pin Detection Voltage, CDT pin Detection Voltage, CIT pin Detection
Voltage, Short circuit Detection Voltage Delay Time (Test circuit 3)
The CTLC input voltage “L” (V
decreasing the CTLC pin’s voltage gradually from the initial status. After that, increasing the CTLC pin’s voltage
gradually, the CTLC pin’s voltage when the COP pin’s voltage is set to “H”; is the CTLC input voltage “H” (V
The CTLD input voltage “L” (V
decreasing the CTLD pin’s voltage gradually from the initial status. After that, increasing the CTLD pin’s voltage
gradually, the CTLD pin’s voltage when the DOP pin’s voltage is set to “H”; is the CTLD input voltage “H” (V
Start from the initial status, set V4 = 0 V. Confirm the DOP pin is in “L”. After that, decreasing the SEL pin’s
voltage gradually, the SEL pin’s voltage when the DOP pin’s voltage is set to “H”; is the SEL input voltage “L”
(V
set to “L”; is the SEL input voltage “H” (V
Confirm both COP and DOP pins are in “H” (its voltage level is V
V
initial status.)
The CCT pin internal resistance (R
setting V1 = 4.7 V from the initial status.
The CDT pin internal resistance (R
setting V1 = 1.5 V from the initial status.
The CIT pin internal resistance 1 (R
setting V
The CIT pin internal resistance 2 (R
setting V
The CCT pin detection voltage (V
(voltage V
initial state.
The CDT pin detection voltage (V
(voltage V
initial state.
CTLC
SELL
). After that, increasing the SEL pin’s voltage gradually, the SEL pin’s voltage when the DOP pin’s voltage is
= V
VINI
VINI
CTLD
DS
DS
= V
= V
× 0.1 V or less) after increasing the CCT pin’s voltage gradually, after setting V1 = 4.7 V from the
× 0.1 V or less) after increasing the CDT pin’s voltage gradually, after setting V1 = 1.5 V from the
= V
DIOV1
DIOV2
DD
, V
max. + 0.05 V from the initial status.
max. + 0.05 V from the initial status.
VINI
= CCT = CDT = CIT = V
SELH
CTLCH
CTLDH
CTLCL
CTLDL
), SEL Input Voltage “L” (V
CCT
CDT
INC
IND
), CTLC Input Voltage “L” (V
), CTLD Input Voltage “L” (V
CCT
CDT
INC
IND
INI1
INI2
)
)
INI1
INI2
) is the CTLC pin’s voltage; when the COP pin’s voltage is set to “L” after
) is the CTLD pin’s voltage; when the DOP pin’s voltage is set to “L” after
)
)
) is R
) is R
)
)
) is the voltage at the CCT pin when the COP pin’s voltage is set to “L”
) is the voltage at the CDT pin when the DOP pin’s voltage is set to “L”
) is R
) is R
Seiko Instruments Inc.
SELH
INC
IND
INI1
INI2
).
= V
= V
= V
= V
DS
DS
DS
DS
SS
/ I
/ I
, V1 = V2 = V3 = V4 = 3.5 V. (This status is referred to as
/ I
/ I
CCT
CDT
CIT1
CIT2
, I
, I
, I
, I
CCT
CDT
SELL
CIT1
CIT2
is the current which flows from the CCT pin when
is the current which flows from the CDT pin when
)
CTLCL
CTLDL
is the current which flows from the CIT pin when
is the current which flows from the CIT pin when
DS
× 0.9 V or more) after setting V
)
)
Rev.3.2
VMP
= V
CTLCH
CTLDH
_00
SEL
).
).
=